Integrated circuit memory device including banks of memory cells

Details Integrated circuit memory device including banks of memory cells Integrated circuit memory device including banks of memory cells

1996-04-25

1997-07-22

Nguyen, Tan T.

Horology: time measuring systems or devices

Displays or display device details

Dial or hand

36523006, G11C 800

Patent

active

056509774

ABSTRACT:
An integrated circuit memory device includes a plurality of memory cells, a plurality of data lines, a memory cell selector, and a memory cell connector. The memory cells are arranged in a matrix of rows and columns wherein the plurality of memory cells are further grouped in banks with each bank including at least two rows of memory cells. Each of the data lines extends along one of the columns of memory cells so that each of the data lines extends along memory cells from each of the banks of memory cells. The memory cell selector includes a row decoder which selects one of the plurality of rows, a column decoder which selects one of the plurality of columns, and a bank decoder which selects one of the banks. The connector connects one of the memory cells to a respective data line in response to the memory cell selector. Accordingly, data from only one of the memory cells is provided on a respective one of the data lines at any point and time.

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