Integrated circuit layout and a semiconductor device...

Details Integrated circuit layout and a semiconductor device... Integrated circuit layout and a semiconductor device...

2006-08-01

2006-08-01

Parekh, Nitin (Department: 2811)

Active solid-state devices (e.g., transistors, solid-state diode

Gate arrays

With particular signal path connections

C257S210000, C257S211000, C257S314000, C257S315000, C257S316000, C257S319000

Reexamination Certificate

active

07084440

ABSTRACT:
An integrated circuit layout and a semiconductor device manufactured using the same are provided. According to one embodiment, a semiconductor device has a substrate and a plurality of bar type patterns on the substrate. The bar type patterns are substantially parallel to each other. At least one of the bar type patterns includes first and second ends and a middle part therebetween. The bar type patterns has an overhang at the first end thereof. The bar type patterns may be gate patterns, bit line patterns or active patterns.

REFERENCES:
patent: 6545892 (2003-04-01), Takano et al.
patent: 6713886 (2004-03-01), Kumagai et al.
patent: 2003/0062550 (2003-04-01), Sekiguchi et al.
Syd R. Wilson, Clarence J. Tracy, and John L. Freeman, Jr., “Handbook of Multilevel Metallization for Integrated Circuits,” Noyes Publ., Westwood, New Jersey, (1993), p. 675.

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