Electrical computers and digital data processing systems: input/ – Input/output data processing – Peripheral monitoring
Reexamination Certificate
2008-07-08
2008-07-08
Peyton, Tammara (Department: 2182)
Electrical computers and digital data processing systems: input/
Input/output data processing
Peripheral monitoring
C710S038000, C375S295000, C375S356000, C713S400000, C713S401000
Reexamination Certificate
active
07398333
ABSTRACT:
An integrated circuit input/output interface with empirically determined delay matching is disclosed. In one embodiment, the integrated circuit input/output interface uses empirical information of the signal traces to adjust the transmit/receive clock of each pin of the interface so as to compensate for delay mismatches caused by differences in signal trace lengths. The empirical information, in one embodiment, includes signal flight time of each signal trace, which can be pre-measured or pre-calculated from known signal trace lengths. The empirical information, in another embodiment, includes trace-specific phase offset values calculated from pre-calculated or pre-measured signal flight times or signal trace lengths. In yet another embodiment, a transmitting device generates a set of serially delayed write clocks, which are used to control symbol transmission over signal traces so as to reduce simultaneous switching output noise and ground bound in the transmitting device.
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Best Scott C.
Hampel Craig E.
Morgan & Lewis & Bockius, LLP
Peyton Tammara
Rambus Inc.
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