Integrated circuit incorporating dual organization memory array

Details Integrated circuit incorporating dual organization memory array Integrated circuit incorporating dual organization memory array

2005-05-03

2005-05-03

Nguyen, Hiep T. (Department: 2187)

Electrical computers and digital processing systems: memory

Address formation

Address mapping

C711S212000, C711S220000

Reexamination Certificate

active

06889307

ABSTRACT:
A memory organization supports a basic page size and an extended page size. A certain portion of its memory cells are dual-addressable memory cells which may be used to provide the additional memory required for the extended pages or alternatively may be used to provide additional memory within a basic page. A memory array is preferably implemented as basic pages and directly addressed to support the basic page size. The received addresses are translated to map each extended page into a portion of a basic page to support the extended pages. In one embodiment, high order row addresses are conveyed for use as high-order column addresses, and the high-order row addresses overridden, to map each extended page into a contiguous block of basic pages.

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