Static information storage and retrieval – Read/write circuit – Testing
Reexamination Certificate
2011-01-25
2011-01-25
Nguyen, Tan T. (Department: 2827)
Static information storage and retrieval
Read/write circuit
Testing
C714S733000
Reexamination Certificate
active
07876633
ABSTRACT:
An integrated circuit includes multiple memory circuits including memory cell arrays different in size, a BIST circuit which has a cell sequential transition test processor and which outputs a test cell address, a transition direction specification signal and an active signal. The integrated circuit has adjustment circuits which are provided respectively for the memory circuits and which replace the test cell address with the test cell address in a memory cell array area, or which convert the active signal into a signal indicating non-execution when the test cell address outputted from the BIST circuit corresponds to a cell in a virtual cell array being in an area outside the memory cell array.
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Aoki Yoshitaka
Hirasaki Yasuyuki
Shinbo Katsumi
McGinn IP Law Group PLLC
Nguyen Tan T.
Renesas Electronics Corporation
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