Integrated circuit in complementary circuit technology comprisin

Details Integrated circuit in complementary circuit technology comprisin Integrated circuit in complementary circuit technology comprisin

1987-08-17

1989-10-10

Hecker, Stuart N.

Static information storage and retrieval

Read/write circuit

Including reference or bias voltage generator

365226, 365190, 3072961, G11C 700, G11C 1140

Patent

active

048736686

ABSTRACT:
An integrated circuit executed in complementary circuit technology, has a substrate bias generator (16) which connects the substrate (1) to a substrate bias. A well (2) of opposite conductivity is inserted into the substrate (1), and FETs with complementary channels are inserted into the substrate (1) and into the well (2), respectively. The source regions (3) of the FET's of first conductivity lie at ground potential. In order to avoid latch-up effects, the output (17) of the substrate bias generator (16) is connected via an electronic switch (S1) to a circuit point (8) lying at ground potential, the switch being driven via a time-delay circuit (24) charged with the supply voltage so that it opens with a prescribed time-delay after the supply voltage is applied.

REFERENCES:
patent: 4438346 (1984-03-01), Chuang et al.
patent: 4460835 (1984-07-01), Masuoka
patent: 4670668 (1987-06-01), Liu
patent: 4670669 (1987-06-01), Cottrell et al.

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