Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Responsive to non-optical – non-electrical signal
Reexamination Certificate
2002-01-30
2004-03-30
Cuneo, Kamand (Department: 2827)
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Responsive to non-optical, non-electrical signal
C257S712000, C257S706000, C174S255000
Reexamination Certificate
active
06713792
ABSTRACT:
FIELD OF THE INVENTION
This present invention relates to electronic circuit devices and, more particularly, to an apparatus and method of manufacturing through-holes, which are used, for example, in connecting power transistors on printed circuit boards, in semiconductors, and the like.
BACKGROUND OF THE INVENTION
In assembling components for electronic devices, integrated circuit chips are mounted on multi-layer boards and cards which are then incorporated into a final product. It is known in the art to attach an integrated circuit chip, or power transistor, to a chip carrier that is then mounted on and secured to a multi-layer circuit board. Usually the chip is soldered to the chip carrier using various known methods such as wave soldering. The chip carrier usually includes pins extending from the surface that is opposite the side where the chip is attached. These pins extend into through-holes formed in the circuit board.
Increasingly, more and more devices are incorporated on a single chip, increasing the number of input and output channels (I/O's) associated with a chip. Thousands of devices have been incorporated into a single chip. As the number of I/O's increase, the number of connections between the integrated circuit and the circuit board and the number of through-holes which must be formed in the circuit board increases. Consequently, to reduce the amount of material that must be taken away from the circuit board to form a through-hole, and to greatly increase the I/O density, it is common to use direct chip methods to mount a chip directly on a printed circuit board.
With direct chip attachment methods, a chip is directly mounted on a circuit board using solder balls to connect the chip I/O's to the through-holes in the multi-layer board. Such balls have a much smaller diameter than the pins associated with the chip carriers allowing the removal of less material from the board and the closer spacing of the through-holes. Direct chip attachment methods usually involve placing a solder ball directly over the through-holes in the board, then placing the board or chip on top of the balls so that the location of the balls corresponds to I/O's on the chip, and finally soldering the assembly together.
Such multi-layer printed circuit boards used in the above application generally include a plurality of power and signal layers separated by insulating layers. The power, signal and insulating layers are laminated together in one structure making the board. The through-holes in the board for attaching chips, power transistors and the like, are often drilled either mechanically or with a laser all the way through the individual layers before the board is laminated. The manufacturing technique involves drilling all the way through each layer and then repeating this step with the other layers before lamination occurs. Additional preparation of each through-hole is required, before lamination of the layers occur. The result is a solidly laminated printed circuit board. As the number of I/O's associated with a chip increases, the density of the through-holes increases. Consequently, because of the increased number of through-holes manufacturing is time consuming and expensive.
In one invention that avoids the problems associated with a high density of through-holes in the circuit board, multi-layer boards have been fabricated using cores. A plurality of cores that typically consist of a power plane, upper and lower signal layers, and plated through-holes extending through the thickness of the core, are first fabricated. A circuit board is formed by joining two or more cores together. In this method it is essential that the electrical connections be properly achieved between the vertically aligned plated through-holes and adjacent cores. This is difficult to achieve and elaborate jigs must be created to set up the circuit board.
Proper electrical connections joining cores have been achieved by applying an upper and lower cap to each core. The caps consist of a layer of conductive material. The electrically conductive material is then joined to a layer of electrically insulating material. Each cap includes via holes extending completely through the thickness of the insulating layer. These via holes are formed in the insulating layer at points corresponding to the plated through holes in the cores, so that when the cap is placed adjacent to the core the vias and the plated through-holes will be aligned. After the formation of the vias in the electrically insulating layer of the cap, electrically conductive material is deposited into each via hole using conventional electroplating techniques. However, this method requires numerous and costly steps in providing through-holes in a multi-layer heavy density printed circuit board.
There is yet another method of manufacturing a printed circuit board whereby through-holes are first formed, by photolithography, in a base plate having two main surfaces and electrically insulating, transparent and photosensitive properties. The through-holes extend from one of the main surfaces to the other, with a cross-sectional area thereof decreasing from opposite ends to an intermediate position. Conductive layers are formed to fill the through-holes and extend over the main surfaces of the base plate. Then the conductive layers formed on one of the main surfaces of the base plate are removed. Portions of the base plate are then removed from one of the main surfaces so that the conductive layers filling the through-holes project from one of the main surfaces of the base plate. This method requires through-holes in each surface to be individually formed prior to the different surfaces bonding to each other. This method of manufacturing is time consuming and costly because of the photolithography process.
In yet another invention there is a process for making an assembly of a semiconductor device that includes a hole forming step that forms a plurality of through-holes in a reinforced insulator plate. The plate has a first side pad electrode layer, a semiconductor layer having a first side semiconductor surface facing toward the first side pad electrode layer, and a second side semiconductor surface opposite to the first side semiconductor surface. Each of the through-holes extends from the first side plate surface of the reinforcing plate to a second side plate surface of the reinforcing plate.
The process further comprises a second side conductive layer forming step of forming a second side conductive layer on the second side plate surface of the reinforcing plate. Next there is a first side conductive layer preparing step of forming a second side conductive layer on the first side plate surface of the reinforcing plate.
As this method proceeds, it includes a first connecting step of connecting the first and second side conductive layers by filling a first conductive bonding material, in the through-holes, and joining the semiconductor piece and reinforcing plate by forming a layer of the first conductive bonding material between the first side electrode layer and the second side conductive layer. The next step is a grinding of the semiconductor piece mounted on the reinforced plate from the second side semiconductor surface to form a ground semiconductor surface. The reinforcing plate having through-holes for electrical connections enables the grinding and eventual bonding of the semiconductor piece to the reinforcing plate. However, this method of manufacturing is both time consuming with many manufacturing steps and therefore is costly.
In the manufacture of integrated circuit boards, the chip package designer attempts to obtain ever greater wiring densities while, at the same time, forming interconnections between adjacent layers that provide reliable circuits with as little inductance and resistance as possible. As a consequence, the through-holes that are used for interconnections are produce high quality interconnections.
It is known to use lasers to form vias in multi-layer boards. There is a process for manufacturing a m
Anaren Microwave, Inc.
Bond Schoeneck & King , PLLC
Cruz Lourdes
Cuneo Kamand
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