Integrated circuit having programmable pull device configured to

Details Integrated circuit having programmable pull device configured to Integrated circuit having programmable pull device configured to

1998-04-14

2000-04-18

Lee, Thomas C.

Electrical computers and digital data processing systems: input/

Input/output data processing

Input/output access regulation

710 7, 710 11, 710 14, 710 31, 365194, 365200, G06F 1300

Patent

active

060527463

ABSTRACT:
Method and apparatus for selectively enabling a pull device coupled to a multiplexed terminal connector based on the function of the terminal connector. When the terminal functions as a general purpose input/output (GPIO), the pull device is enabled on reset or on setting a control bit. For operation as a data port, the pull device is disabled, and on reset the pull device is enabled only after any pending data transaction has completed. Upon completion of the reset period the pull device is again disabled for data port operation. In one embodiment, a terminal has a first interruptible function and a second uninterruptible function. The terminal is coupled to a pull device and control logic. If the second function is active, the control logic enables the pull device with a time delay sufficient that the second function is completed prior to the enabling of the pull device.

REFERENCES:
patent: Re34363 (1993-08-01), Freeman
patent: 4349870 (1982-09-01), Shaw et al.
patent: 4680487 (1987-07-01), Kobayashi
patent: 5146565 (1992-09-01), Blanck et al.
patent: 5226010 (1993-07-01), Glider et al.
patent: 5237221 (1993-08-01), Posse
patent: 5379382 (1995-01-01), Work et al.
patent: 5396639 (1995-03-01), Suenaga et al.
patent: 5596765 (1997-01-01), Baum et al.
patent: 5752077 (1998-05-01), Yiu et al.
patent: 5841707 (1998-11-01), Cline et al.
patent: 5889710 (1999-03-01), Pascucci
patent: 5900021 (1999-05-01), Tiede et al.
patent: 5915080 (1999-06-01), Park
patent: 5969543 (1999-10-01), Erickson et al.
Motorola Inc., 1990, MC68340 Integrated Processor User's Manual, pp. 4-14--4-16, Section 4.2.4.2 "Global Chip-Select Operation".
Intel 8051 Handbook, Document No.: Unknown, Country: Japan, Translation: No, Name:FIG. 3-6 from Intel 8051 Handbook, p. 47.

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