Integrated circuit having formed therein low contact leakage and

Details Integrated circuit having formed therein low contact leakage and Integrated circuit having formed therein low contact leakage and

1997-04-17

2000-02-15

Crane, Sara

Active solid-state devices (e.g., transistors, solid-state diode

Field effect device

Having insulated electrode

257384, 257763, H01L 2976

Patent

active

060256346

ABSTRACT:
An integrated circuit having formed therein a low contact leakage and low contact resistance integrated circuit device electrode. The integrated circuit comprises a semiconductor substrate having an isolation region formed upon the semiconductor substrate. The isolation region bounds an active region of the semiconductor substrate adjoining the isolation region. There is formed at least in part within the active region of the semiconductor substrate an integrated circuit device. The integrated circuit device has an integrated circuit device electrode formed within a portion of the active region of the semiconductor substrate bounded by the isolation region. The integrated circuit also comprises a patterned metal silicide layer aligned upon the integrated circuit device electrode. Finally the integrated circuit also comprises a patterned metal silicide forming metal layer formed at least partially overlapping the patterned metal silicide layer and formed contiguously extending upon the isolation region, where the patterned metal silicide layer is formed employing a metal equivalent to the metal employed in forming the patterned metal silicide forming metal layer.

REFERENCES:
patent: 4378383 (1983-03-01), Moritz
patent: 4448800 (1984-05-01), Ehara et al.
patent: 4520041 (1985-05-01), Aoyama et al.
patent: 4532702 (1985-08-01), Gigante et al.
patent: 4544445 (1985-10-01), Jeuch et al.
patent: 4592802 (1986-06-01), Deleonibus et al.
patent: 4926237 (1990-05-01), Sun et al.
patent: 5049975 (1991-09-01), Ajika et al.
patent: 5298784 (1994-03-01), Gambino et al.
patent: 5523626 (1996-06-01), Hayashi et al.
patent: 5652464 (1997-07-01), Liao et al.
patent: 5831335 (1998-11-01), Miyamoto
S. Wolf et al, "Silicon Processing For The VLSI Era, vol. 1" Lattice Press, Sunset Beach, CA, 1986, p 377-379.

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