Semiconductor device manufacturing: process – Formation of electrically isolated lateral semiconductive... – Total dielectric isolation
Reexamination Certificate
2007-08-28
2007-08-28
Nguyen, Tuan H. (Department: 2813)
Semiconductor device manufacturing: process
Formation of electrically isolated lateral semiconductive...
Total dielectric isolation
C438S412000
Reexamination Certificate
active
11196087
ABSTRACT:
The present invention provides an integrated circuit and a method of manufacture therefor. The integrated circuit (100), in one embodiment without limitation, includes a dielectric layer (120) located over a wafer substrate (110), and a semiconductor substrate (130) located over the dielectric layer (120), the semiconductor substrate (130) having one or more transistor devices (160) located therein or thereon. The integrated circuit (100) may further include an interconnect (180) extending entirely through the semiconductor substrate (130) and the dielectric layer (120), thereby electrically contacting the wafer substrate (110), and one or more isolation structures (150) extending entirely through the semiconductor substrate (130) to the dielectric layer (120).
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Hower Philip L.
Lin John
Loftin William C.
Mollat Martin B.
Phan Tony T.
Brady III W. James
Garner Jacqueline J.
Nguyen Tuan H.
Texas Instruments Incorporated
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