Error detection/correction and fault detection/recovery – Pulse or data error handling – Replacement of memory spare location – portion – or segment
Reexamination Certificate
2006-05-16
2006-05-16
Decady, Albert (Department: 2138)
Error detection/correction and fault detection/recovery
Pulse or data error handling
Replacement of memory spare location, portion, or segment
C714S718000, C714S006130, C365S200000
Reexamination Certificate
active
07047454
ABSTRACT:
An integrated circuit includes a data processing unit, a buffer memory, and a setting memory. The buffer memory performs the function of registers for storing data for the processing unit. The buffer memory is connected to the setting memory. The setting memory can be written to through the buffer memory.
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Kaiser Robert
Schamberger Florian
De'cady Albert
Greenberg Laurence A.
Infineon - Technologies AG
Locher Ralph E.
Stemer Werner H.
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