Integrated circuit for square root operation using neural networ

Details Integrated circuit for square root operation using neural networ Integrated circuit for square root operation using neural networ

1990-11-26

1992-09-29

Malzahn, David H.

Boots, shoes, and leggings

G06F 7552

Patent

active

051518740

ABSTRACT:
An integrated circuit for performing a square root operation uses adders made in accordance with neural network concepts. The integrated circuit includes an exponent part, a first mantissa part, a second mantissa part and a control part. The exponent part computes an exponent of the square root of an input operand; the first mantissa part preprocesses the mantissa of the input operand; the second mantissa part computes the square root of the output from the first mantissa part; and the control part controls interaction of input and output among various components of the integrated circuits. Because the adders used in integrated circuit are composed of neural network circuits having a short propagation time for carry bits, the integrated circuit can computer a square root fast and efficiently.

REFERENCES:
patent: 4336599 (1982-06-01), Wong
Rutter, "Direct Extraction of a Binary Floating Point Square Root" IBM Tech. Disclosure Bulletin, vol. 14, No. 10, Mar. '72, pp. 3157-3159.
Murphy et al, "Square-Root Procedure for Binary Floating-Point Numbers" IBM Tech. Disclosure Bulletin, vol. 21, No. 2, Jul. 1978, p. 785.

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