Integrated circuit fabrication process

Details Integrated circuit fabrication process Integrated circuit fabrication process

1996-12-05

2000-07-04

Mulpuri, Savitri

Semiconductor device manufacturing: process

Formation of electrically isolated lateral semiconductive...

Recessed oxide by localized oxidation

H01L 2176

Patent

active

060838108

ABSTRACT:
A method of semiconductor circuit fabrication utilizing the poly buffered LOCOS process is disclosed. Amorphous silicon is desirably formed by the decomposition of disilane at temperatures between 400-525.degree. C. The amorphous silicon exhibits less pits than what is produced by conventional processes. The absence of pits contributes to eventual substrate integrity.

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