Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – Insulated gate formation
Patent
1997-08-26
1998-12-08
Bowers, Jr., Charles L.
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
Insulated gate formation
438592, 438585, 438652, 438653, 438655, 438656, 438618, 438621, 438649, 438642, 438625, 259412, 259413, H01L 21283
Patent
active
058468714
ABSTRACT:
Undesirable counter doping of n.sup.+ /p.sup.+ gates illustratively through cross diffusion through an overlying silicide is inhibited by insertion of layers of titanium nitride and titanium, tungsten or tantalum between the polysilicon gates and an overlying silicide.
REFERENCES:
patent: 4745079 (1988-05-01), Pfiester
patent: 4810666 (1989-03-01), Taji
patent: 4890141 (1989-12-01), Tang et al
patent: 4900257 (1990-02-01), Meada
patent: 4978626 (1990-12-01), Poon et al.
patent: 4997785 (1991-03-01), Pfiester
patent: 5023201 (1991-06-01), Stanasolovich et al.
patent: 5027185 (1991-06-01), Liauh
patent: 5034348 (1991-07-01), Hartswick et al.
patent: 5064775 (1991-11-01), Chang
patent: 5075248 (1991-12-01), Yoon et al.
patent: 5276347 (1994-01-01), Wei et al.
patent: 5362981 (1994-11-01), Sato et al.
patent: 5382831 (1995-01-01), Atakov et al.
patent: 5468689 (1995-11-01), Cunningham et al.
patent: 5559047 (1996-09-01), Urabe
patent: 5667630 (1997-09-01), Lo
patent: 5710454 (1996-04-01), Wu
patent: 5714786 (1996-10-01), Gonzales et al.
patent: 5753565 (1994-09-01), Becker
patent: 5760475 (1987-03-01), Cronin et al.
Patent Abstracts of Japan vol. 11, No. 292 (E-543) 19 Sep. 1987 & JP-A-62 092 360 (Toshiba) 27 Apr. 1987 (No translation).
Hitoshi Wakabayashi et al, "Highly Reliable W/TiN/pn-poly-Si Gate CMOS Technology With Simultaneous Gate and Source/Drain Doping Process", IEDM Technical Digest, Dec. 8-11, 1996.
Lee Jean Ling
Ma Yi
Merchant Sailesh Mansinh
Bowers Jr. Charles L.
Grillo Anthony
Lucent Technologies - Inc.
Nguyen Thanh
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