Integrated circuit electrode structure and process for fabricati

Details Integrated circuit electrode structure and process for fabricati Integrated circuit electrode structure and process for fabricati

1996-12-23

1998-03-03

Bell, Janyce

Coating processes

Electrical product produced

Integrated circuit, printed circuit, or circuit board

427123, 427125, 4273831, 427399, 427404, B05D 506

Patent

active

057231710

ABSTRACT:
An electrode for a ferroelectric electronic device is formed on an SiO.sub.2 isolation layer by depositing an adhesion layer, such as titanium, between about 25 .ANG. and 500 .ANG. thick, then a layer of a nobel metal, such as platinum, that is at least 10 times thicker than the adhesion layer. The electrode is then annealed at a temperature higher than the minimum oxide eutectic temperature of the adhesion layer. The electrode is moved into the annealing furnace at a ramp rate such that it reaches its anneal temperature in five minutes or less. The relative thinness of the adhesion layer and the quick ramp up of the anneal causes all the titanium to be tied up in the oxide before it can diffuse through the platinum, and prevents the formation of rutile phases of the titanium and defects such as voids and hillocks in the platinum, which can destabilize the electrode.

REFERENCES:
patent: 4423087 (1983-12-01), Howard et al.
patent: 4584084 (1986-04-01), Asano et al.
patent: 4801469 (1989-01-01), Norwood
patent: 5179071 (1993-01-01), Ekin et al.
patent: 5190601 (1993-03-01), Yamakawa et al.
patent: 5445922 (1995-08-01), Maple

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