Integrated circuit dielectric formation

Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material

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Details

438624, 438626, 438627, 438783, H01L 213115, H01L 2128

Patent

active

061402222

ABSTRACT:
An integrated circuit and its method of formation are disclosed. The circuit utilizes a spin-on glass as an interlevel dielectric. Above and below the spin-on glass is located a phosphorous doped dielectric. The doped dielectric prevents sodium from becoming mobile under the influence of subsequently applied electric fields.

REFERENCES:
patent: 4795722 (1989-01-01), Welch et al.
patent: 4845054 (1989-07-01), Mitchener
patent: 4952524 (1990-08-01), Lee et al.
patent: 4999317 (1991-03-01), Lu et al.
patent: 5317192 (1994-05-01), Chen et al.
Ghandhi, S., "V.L.S.I. Fabrication Priciples: Silicon and Gallium Arsenide", John Wiley and Sons, pp. 517-519, 1983.
Ghandhi, S., VLSI Fabrication Principles: Silicon & Gallium Arsenide, 1983, John Wiley & Sons, pp. 424-426.
Wolf, S., Silicon Processing for the VLSI Era : vol. 2 Process Integration, Lattice Press, 1990, pp. 194-195, 198-199, 229-230, 233-235.
Wolf, S., Silicon Processing for the VLSI Era: vol. 2 Process Integration, Lattice Press 1990, p. 236.
"In Situ Planarization of Dielectric Surfaces Using Boron Oxide," 1989 IEEE, VMIC Conference, Jun. 12-13, 1989, J. Marks et al., pp. 89-95.
"An Improved Interlevel Dielectric Process for Submicron Double-Level Metal Products," IEEE, VMIC Conference, Jun. 12-13, 1989, S.L.Pennington et al., pp. 355-359.
O. Spindler, B. Neureither--In Situ Planarization of Intermetal Dielectrics: Process Steps, Degree of Planarization and Film Properties--Thin Solid Films, 175 (1989) Aug., No. 1, Lausanne, CH, pp. 67-72.
P.K. Sinha and J.A. Smythe--Moisture and Phosphorous Sensitivity of Sacrificial Spin-On-Glass Dielectric Planarization Process--Journal of the Electrochemical Society, 138 (1991) Mar., No. 3, Manchester, NH, US--pp. 854-856.
J. Kalpathy Cramer and S.P. Murarka--Sodium Passivation Dependence on Phosphorus Concentration in Tetraethylorthosilicate Plasma-enhanced Chemical Vapor Deposited Phosphosilicate Glasses--J. Appl. Phys. 73 (5), Mar. 1, 1993--pp. 2458-2461.

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