Integrated circuit die for wire bonding and flip-chip mounting

Details Integrated circuit die for wire bonding and flip-chip mounting Integrated circuit die for wire bonding and flip-chip mounting

2005-12-06

2005-12-06

Cao, Phat X. (Department: 2814)

Active solid-state devices (e.g., transistors, solid-state diode

Combined with electrical contact or lead

Flip chip

C257S780000

Reexamination Certificate

active

06972494

ABSTRACT:
An integrated circuit die carries conductive pads and thereon, the larger pads being suitable for flip-chip assembly and the smaller pads being suitable for wire bond assembly. The pitch between pads is at least the minimum required for flip-chip assembly, whereas the pitch between each of pads and the adjacent pad or pads is at least the minimum required for wire bond assembly. For wire bond assembly a passivation layer exposing all pads is provided, whereas for flip-chip assembly a passivation layer exposes only certain pads so that conductive bumps may be provided. The provision of pads complying with the minimum spacing requirements for both flip-chip and wire bond assembly enables a “dual purpose” (e.g. one set of pads being for normal production and another set for testing purposes) die to be produced without any increase in die size.

REFERENCES:
patent: 5155065 (1992-10-01), Schweiss
patent: 5381307 (1995-01-01), Hertz
patent: 5641946 (1997-06-01), Shim
patent: 5757082 (1998-05-01), Shibata
patent: 5801450 (1998-09-01), Barrow
patent: 6175157 (2001-01-01), Morifuji
patent: 6265783 (2001-07-01), Juso et al.
patent: 0 481 889 (1991-10-01), None
patent: 0 588 481 (1993-08-01), None
European Search Report, dated Nov. 24, 1999.

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