Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Chip mounted on chip
Reexamination Certificate
2006-09-26
2006-09-26
Kebede, Brook (Department: 2823)
Active solid-state devices (e.g., transistors, solid-state diode
Combined with electrical contact or lead
Chip mounted on chip
C257S778000, C257SE21503, C257SE21511, C438S108000
Reexamination Certificate
active
07112887
ABSTRACT:
An electronic assembly is assembled by stacking two or more integrated circuit dies on top of one another. Prior to singulation, an opening is laser-drilled into an upper die, and subsequently filled with a conductive member. The conductive member is located on a lower die and interconnects integrated circuits of the upper and lower dies. Laser-drilling allows for faster throughput when compared to, for example, etching, especially if a small number of openings has to be formed. The opening is laser-drilled from an upper surface of the upper die all the way through the die, which allows for the use of alignment marks on an upper surface of the upper die.
REFERENCES:
patent: 3323198 (1967-06-01), Shortes
patent: 3484341 (1969-12-01), Devitt
patent: 3562009 (1971-02-01), Cranston et al.
patent: 3648131 (1972-03-01), Stuby
patent: 3810129 (1974-05-01), Behman et al.
patent: 3811117 (1974-05-01), Anderson, Jr. et al.
patent: 3881884 (1975-05-01), Cook et al.
patent: 3993917 (1976-11-01), Kalter
patent: 4016644 (1977-04-01), Kurtz
patent: 4023562 (1977-05-01), Hynecek et al.
patent: 4079508 (1978-03-01), Nunn
patent: 4089992 (1978-05-01), Doo et al.
patent: 4153998 (1979-05-01), McMurtry
patent: 4188258 (1980-02-01), Mounteer et al.
patent: 4205556 (1980-06-01), Runyan
patent: 4211603 (1980-07-01), Reed
patent: 4276533 (1981-06-01), Tominaga et al.
patent: 4291293 (1981-09-01), Yamada et al.
patent: 4348253 (1982-09-01), Subbarao et al.
patent: 4368106 (1983-01-01), Anthony
patent: 4394712 (1983-07-01), Anthony
patent: 4403241 (1983-09-01), Butherus et al.
patent: 4426767 (1984-01-01), Swanson et al.
patent: 4463336 (1984-07-01), Black et al.
patent: 4467518 (1984-08-01), Bansal et al.
patent: 4467521 (1984-08-01), Spooner et al.
patent: 4512829 (1985-04-01), Ohta et al.
patent: 4545610 (1985-10-01), Lakritz et al.
patent: 4603341 (1986-07-01), Bertin et al.
patent: 4628174 (1986-12-01), Anthony
patent: 4722130 (1988-02-01), Kimura et al.
patent: 4769738 (1988-09-01), Nakamura et al.
patent: 4807021 (1989-02-01), Okumura
patent: 4842699 (1989-06-01), Hua et al.
patent: 4897708 (1990-01-01), Clements
patent: 4954458 (1990-09-01), Reid
patent: 4978639 (1990-12-01), Hua et al.
patent: 4996587 (1991-02-01), Hinrichsmeyer et al.
patent: 5071792 (1991-12-01), VanVonno et al.
patent: 5160987 (1992-11-01), Pricer et al.
patent: 5166097 (1992-11-01), Tanielian
patent: 5191405 (1993-03-01), Tomita et al.
patent: 5200810 (1993-04-01), Wojnarowski et al.
patent: 5225771 (1993-07-01), Leedy
patent: 5270261 (1993-12-01), Bertin et al.
patent: 5307942 (1994-05-01), Quelfeter et al.
patent: 5309318 (1994-05-01), Beilstein, Jr. et al.
patent: 5313097 (1994-05-01), Haj-Ali-Ahmadi et al.
patent: 5314844 (1994-05-01), Imamura
patent: 5322816 (1994-06-01), Pinter
patent: 5323035 (1994-06-01), Leedy
patent: 5340771 (1994-08-01), Rostoker
patent: 5355283 (1994-10-01), Marrs et al.
patent: 5357672 (1994-10-01), Newman
patent: 5380681 (1995-01-01), Hsu
patent: 5399898 (1995-03-01), Rostoker
patent: 5414637 (1995-05-01), Bertin et al.
patent: 5426566 (1995-06-01), Beilstein, Jr. et al.
patent: 5432677 (1995-07-01), Mowatt et al.
patent: 5453404 (1995-09-01), Leedy
patent: 5463246 (1995-10-01), Matsunami
patent: 5466634 (1995-11-01), Beilstein, Jr. et al.
patent: 5467305 (1995-11-01), Bertin et al.
patent: 5468663 (1995-11-01), Bertin et al.
patent: 5468999 (1995-11-01), Lin et al.
patent: 5478781 (1995-12-01), Bertin et al.
patent: 5489554 (1996-02-01), Gates
patent: 5494832 (1996-02-01), Lehmann et al.
patent: 5502333 (1996-03-01), Bertin et al.
patent: 5502667 (1996-03-01), Bertin et al.
patent: 5502893 (1996-04-01), Endoh et al.
patent: 5506753 (1996-04-01), Bertin et al.
patent: 5517057 (1996-05-01), Beilstein, Jr. et al.
patent: 5517754 (1996-05-01), Beilstein, Jr. et al.
patent: 5532519 (1996-07-01), Bertin et al.
patent: 5550942 (1996-08-01), Sheem
patent: 5557844 (1996-09-01), Bhatt et al.
patent: 5561622 (1996-10-01), Bertin et al.
patent: 5563086 (1996-10-01), Bertin et al.
patent: 5567653 (1996-10-01), Bertin et al.
patent: 5567654 (1996-10-01), Beilstein, Jr. et al.
patent: 5571754 (1996-11-01), Bertin et al.
patent: 5596226 (1997-01-01), Beilstein, Jr. et al.
patent: 5615477 (1997-04-01), Sweitzer
patent: 5646067 (1997-07-01), Gaul
patent: 5654127 (1997-08-01), Leedy
patent: 5761802 (1998-06-01), Grigas
patent: 5843844 (1998-12-01), Miyanaga
patent: 5998292 (1999-12-01), Black et al.
patent: 6052287 (2000-04-01), Palmer et al.
patent: 6184060 (2001-02-01), Siniaguine
patent: 6223432 (2001-05-01), Dennison et al.
patent: 6260266 (2001-07-01), Tamaki
patent: 6314641 (2001-11-01), Akram
patent: 6353189 (2002-03-01), Shimada et al.
patent: 6407341 (2002-06-01), Anstrom et al.
patent: 6444576 (2002-09-01), Kong
patent: 6639155 (2003-10-01), Bupp et al.
patent: 2002/0075106 (2002-06-01), Okubora et al.
patent: 2003/0155247 (2003-08-01), Miura et al.
patent: 0 698 288 (1996-02-01), None
patent: 0 757 431 (1997-02-01), None
patent: 59-15595 (1984-09-01), None
patent: 6-302954 (1994-10-01), None
patent: WO 92/03848 (1992-03-01), None
patent: WO 94/09513 (1994-04-01), None
patent: WO 94/25981 (1994-11-01), None
patent: WO 96/21943 (1996-07-01), None
patent: WO 97/45856 (1997-12-01), None
patent: WO 97/45862 (1997-12-01), None
Anthony, Thomas R., “Forming Feedthroughs in Laser-Drilled Holes in Semiconductor Wafers by Double-Sided Sputtering,” IEEE Trans. On Comp., Hybrids, & Mfg. Tech., Mar. 1982, pp. 171-180, vol. CHMT-5, No. 1.
AZ Corporation, “Plasma Jet Etching Technology and Equipment; Silicon Wafer Thinning and Isotropical Etching at Atmospheric Pressure,” Semicon/Europe, Apr. 1995, 4 pages, Geneva, Switzerland.
Christensen, C., et al., “Wafer Through-Hole Interconnections with High Vertical Wiring Densities,” IEEE Trans. On Comp., Pkg. & Mfg. Tech., Dec. 1996, pp. 516-521, vol. 19, No. 4, Part A.
IPEC Precision brochure for PACEJET II (© 1996), 2 pages.
Siniaguine, Oleg, “Plasma Jet Etching at Atmospheric Pressure for Semiconductor Production,” First International Symposium on Plasma Process-Induced Damage, May 13-14, 1996, Santa Clara, California, pp. 151-153.
Siniaguine, O., et al., “Plasma Processing of Silicon Wafers at Atmospheric Pressure,” Electronic Industry, Jun. 1994, pp. 27-30 (not translated).
Atwood Greg
Chiang Chien
Natarajan Bala
Rao Valluri R.
Swan Johanna M.
Blakely , Sokoloff, Taylor & Zafman LLP
Intel Corporation
Kebede Brook
Kim Su C.
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