Integrated circuit diagonal wiring architectures with zag...

Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Flip chip

Reexamination Certificate

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C257S666000, C257S686000, C257S777000

Reexamination Certificate

active

06858939

ABSTRACT:
An integrated circuit has a metal layer that includes conductors to provide interconnectivity for components of the integrated circuit chip. The metal layer is divided into at least two sections, such that a first section has a preferred direction and the second section has a preferred wiring direction that is different from the first preferred direction. The first and second preferred directions on a single metal layer may consist of any direction. The metal layer may be divided into more than two sections, wherein each section has a preferred wiring direction. Wiring geometries for multi-level metal layers are also disclosed.

REFERENCES:
patent: 5637920 (1997-06-01), Loo
patent: 5646830 (1997-07-01), Nagano
patent: 5822214 (1998-10-01), Rostoker et al.
patent: 6150193 (2000-11-01), Glenn
patent: 6307256 (2001-10-01), Chiang et al.
patent: 6316838 (2001-11-01), Ozawa et al.

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