Integrated circuit devices with high and low voltage...

Semiconductor device manufacturing: process – Making field effect device having pair of active regions... – On insulating substrate or layer

Reexamination Certificate

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Details

C438S149000, C438S150000, C438S153000, C438S154000, C438S197000, C438S198000, C438S199000

Reexamination Certificate

active

07635618

ABSTRACT:
The present invention includes a technique for making a dual voltage integrated circuit device. A gate dielectric layer is formed on a semiconductor substrate and a gate material layer is formed on the dielectric layer. A first region of the gate material layer is doped to a first nonzero level and a second region of the gate material level is doped to a second nonzero level greater than the first level. A first field effect transistor is defined that has a first gate formed from the first region. Also, a second field effect transistor is defined that has a second gate formed from the second region. The first transistor is operable at a gate threshold voltage greater than the second transistor in accordance with a difference between the first level and the second level.

REFERENCES:
patent: 5367190 (1994-11-01), Funaki
patent: 5468666 (1995-11-01), Chapman
patent: 5534448 (1996-07-01), Baldi
patent: 6054353 (2000-04-01), Sheu et al.
patent: 6307236 (2001-10-01), Matsuzaki et al.

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