Integrated circuit devices with ESD and I/O protection

Details Integrated circuit devices with ESD and I/O protection Integrated circuit devices with ESD and I/O protection

2006-08-16

2010-10-05

Chambliss, Alonzo (Department: 2892)

Active solid-state devices (e.g., transistors, solid-state diode

Integrated circuit structure with electrically isolated...

Passive components in ics

C257S724000, C257S777000

Reexamination Certificate

active

07808075

ABSTRACT:
The integrated circuit devices disclosed herein generally include two semiconductor dies. The first die generally has little or no I/O or ESD protection and includes a first plurality of exposed terminals (e.g., bump pads). The second die generally includes (i) a second plurality of exposed terminals, wherein at least one of the second plurality of terminals is in electrical communication with one or more of the first plurality of terminals, (ii) a plurality of input and/or output (I/O) circuits, wherein at least one of the I/O circuits is in electrical communication with one or more of the second plurality of terminals, and (iii) a plurality of I/O terminals, wherein at least one of the I/O terminals is in electrical communication with one or more of the I/O circuits. The present invention advantageously provides the ability to fabricate the second die using different (e.g., less expensive) manufacturing processes than those used to fabricate the first die.

REFERENCES:
patent: 6180426 (2001-01-01), Lin
patent: 6303996 (2001-10-01), Lin
patent: 6914259 (2005-07-01), Sakiyama et al.
patent: 7378735 (2008-05-01), Lin
patent: 2003/0076639 (2003-04-01), Chen
Chuan-Cheng Cheng, Choy Hing Li and Shuhua Yu: Integrated Circuit Devices with ESD Protection in Scribe Line, and Methods for Fabricating Same; U.S. Appl. No. 11/521,731; filed Sep. 14, 2006.

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