Integrated circuit devices having reducing variable...

Details Integrated circuit devices having reducing variable... Integrated circuit devices having reducing variable...

2006-10-10

2006-10-10

Nguyen, Tan T. (Department: 2827)

Static information storage and retrieval

Read/write circuit

Differential sensing

C365S149000

Reexamination Certificate

active

07120073

ABSTRACT:
The illustrated embodiments relate to a process for improving retention time of a set of integrated circuit devices. The process comprises placing the set of integrated circuit devices in a reverse bias condition, and elevating the surrounding temperature of the set of integrated circuit devices for a predetermined period of time.

REFERENCES:
patent: 4210464 (1980-07-01), Tanaka et al.
patent: 5657284 (1997-08-01), Beffa
patent: 5680359 (1997-10-01), Jeong
patent: 5754486 (1998-05-01), Nevill et al.
patent: 5844803 (1998-12-01), Beffa
patent: 5852581 (1998-12-01), Beffa et al.
patent: 5867505 (1999-02-01), Beffa
patent: 5885846 (1999-03-01), Beffa
patent: 5898186 (1999-04-01), Farnworth et al.
patent: 5898629 (1999-04-01), Beffa et al.
patent: 5910921 (1999-06-01), Beffa et al.
patent: 5915231 (1999-06-01), Beffa
patent: 5927512 (1999-07-01), Beffa
patent: 5965902 (1999-10-01), Beffa
patent: 5966025 (1999-10-01), Beffa
patent: 5976899 (1999-11-01), Farnworth et al.
patent: 5982682 (1999-11-01), Nevill et al.
patent: 5994915 (1999-11-01), Farnworth et al.
patent: 6003149 (1999-12-01), Nevill et al.
patent: 6032264 (2000-02-01), Beffa et al.
patent: 6058056 (2000-05-01), Beffa et al.
patent: 6067507 (2000-05-01), Beffa
patent: 6079037 (2000-06-01), Beffa et al.
patent: 6094734 (2000-07-01), Beffa et al.
patent: 6100486 (2000-08-01), Beffa
patent: 6118138 (2000-09-01), Farnworth et al.
patent: 6119251 (2000-09-01), Cloud et al.
patent: 6122563 (2000-09-01), Beffa
patent: 6128756 (2000-10-01), Beffa
patent: 6145092 (2000-11-01), Beffa et al.
patent: 6147316 (2000-11-01), Beffa
patent: 6181154 (2001-01-01), Beffa
patent: 6208947 (2001-03-01), Beffa
patent: 6233185 (2001-05-01), Beffa et al.
patent: 6292009 (2001-09-01), Farnworth et al.
patent: 6307171 (2001-10-01), Beffa
patent: 6313658 (2001-11-01), Farnworth et al.
patent: 6324088 (2001-11-01), Keeth et al.
patent: 6347386 (2002-02-01), Beffa
patent: 6350959 (2002-02-01), Beffa
patent: 6363329 (2002-03-01), Beffa
patent: 6365860 (2002-04-01), Beffa
patent: 6365861 (2002-04-01), Beffa
patent: 6373011 (2002-04-01), Beffa
patent: 6424168 (2002-07-01), Farnworth et al.
patent: 6437271 (2002-08-01), Beffa
patent: 6442719 (2002-08-01), Beffa et al.
patent: 6452415 (2002-09-01), Farnworth et al.
patent: 6477662 (2002-11-01), Beffa et al.
patent: 6762966 (2004-07-01), LaRosa et al.
patent: 7015051 (2006-03-01), Shiba
patent: 55-69069 (1980-05-01), None
patent: WO 2005040854 (2005-05-01), None

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