Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
Reexamination Certificate
2011-03-08
2011-03-08
Tran, Minh-Loan T (Department: 2826)
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Having insulated electrode
C257SE21661, C257SE27098, C438S197000
Reexamination Certificate
active
07902608
ABSTRACT:
Disclosed are embodiments of an improved integrated circuit device structure (e.g., a static random access memory array structure or other integrated circuit device structure incorporating both P-type and N-type devices) and a method of forming the structure that uses DTI regions for all inter-well and intra-well isolation and, thereby provides a low-cost isolation scheme that avoids FET width variations due to STI-DTI misalignment. Furthermore, because the DTI regions used for intra-well isolation effectively create some floating well sections, which must each be connected to a supply voltage (e.g., Vdd) to prevent threshold voltage (Vt) variations, the disclosed integrated circuit device also includes a shared contact to a junction between the diffusion regions of adjacent devices and an underlying floating well section. This shared contact eliminates the cost and area penalties that would be incurred if a discrete supply voltage contact was required for each floating well section.
REFERENCES:
patent: 4994406 (1991-02-01), Vasquez et al.
patent: 5843816 (1998-12-01), Liaw et al.
patent: 5930107 (1999-07-01), Rajeevakumar
patent: 5930633 (1999-07-01), Liaw
patent: 6057186 (2000-05-01), Chang et al.
patent: 6232202 (2001-05-01), Hong
patent: 6297127 (2001-10-01), Chen et al.
patent: 6303413 (2001-10-01), Kalnitsky et al.
patent: 6624459 (2003-09-01), Dachtera et al.
patent: 6661049 (2003-12-01), Tzeng et al.
patent: 6667226 (2003-12-01), Pinto et al.
patent: 6833602 (2004-12-01), Mehta
patent: 6864151 (2005-03-01), Yan et al.
patent: 7009237 (2006-03-01), Adkisson et al.
patent: 7019348 (2006-03-01), Tu
patent: 7042044 (2006-05-01), Wu
patent: 7282771 (2007-10-01), Voldman
patent: 2005/0106836 (2005-05-01), Chen et al.
patent: 2007/0145519 (2007-06-01), Peng et al.
patent: 2007/0187769 (2007-08-01), Anderson et al.
patent: 2007/0243671 (2007-10-01), Liaw
Bryant et al., U.S. Appl. No. 12/111,266, filed Apr. 29, 2008.
Anderson Brent A.
Bryant Andres
Nowak Edward J.
Gibb I.P. Law Firm LLC
International Business Machines - Corporation
Kotulak, Esq. Richard M.
Quinto Kevin
Tran Minh-Loan T
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