Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Of specified material other than unalloyed aluminum
Patent
1993-08-26
1996-06-04
Brown, Peter Toby
Active solid-state devices (e.g., transistors, solid-state diode
Combined with electrical contact or lead
Of specified material other than unalloyed aluminum
257754, 257763, 257764, 257767, 257915, H01L 29417, H01L 2943
Patent
active
055236243
ABSTRACT:
A method is provided for patterning a submicron semiconductor layer of an integrated circuit, and an integrated circuit formed according to the same. A conductive structure is formed on the integrated circuit. A dielectric layer is formed over the integrated circuit. A contact opening is formed in the dielectric layer exposing a portion of the underlying first conductive structure. A barrier layer is formed on the dielectric layer and in the contact opening. A substantially conformal layer is formed over the barrier layer and in the contact opening. The conformal layer is partially etched away wherein the conformal layer remains only in a bottom portion of the contact opening. A second conductive layer is formed over the barrier layer and the remaining conformal layer.
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patent: 4833519 (1989-05-01), Kawano et al.
patent: 4884123 (1989-11-01), Dixit et al.
patent: 4976839 (1990-12-01), Inoue
patent: 4994410 (1991-02-01), Sun et al.
Chen Fusen E.
Dixit Girish A.
Miller Robert O.
Brown Peter Toby
Groover Robert
Hill Kenneth C.
Jorgenson Lisa K.
SGS-Thomson Microelectronics Inc.
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