Patent
1988-07-05
1989-05-02
James, Andrew J.
357 74, 357 80, H01L 2314, H01L 2352
Patent
active
048273279
ABSTRACT:
An integrated circuit device including a stacked layer unit having a plurality of stacked layers each having an insulation layer and at least one conductive layer strip formed on a surface of the insulation layer, and at least one chip mounted on the top of the insulation layer and having a plurality of circuit elements. The IC device also includes at least one first conductive member formed in the stacked layer unit, having a low inductance for first signals applied thereto and operatively connecting the first signals to be transferred between the circuit elements. The IC device further includes at least one second conductive member formed in the stacked layer unit, having a higher inductance for the first signals than that of the first conductive member and operatively connecting second signals to be transferred between the circuit elements the stacked layer unit, the chip, and the first and second conductive members are enclosed by a package and sealed with a hermetic seal.
REFERENCES:
patent: 4320438 (1982-03-01), Ibrahim et al.
patent: 4498122 (1985-02-01), Rainal
patent: 4541035 (1985-09-01), Carlson et al.
patent: 4608592 (1986-08-01), Miyamato
Emori Shinji
Kitasagami Hiroo
Miyauchi Akira
Nishimoto Hiroshi
Okiyama Tadashi
Clark Sheila V.
Fujitsu Limited
James Andrew J.
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