Pulse or digital communications – Synchronizers – Phase displacement – slip or jitter correction
Patent
1993-05-10
1997-01-28
Tse, Young T.
Pulse or digital communications
Synchronizers
Phase displacement, slip or jitter correction
370516, 326 81, 331 57, H01L 2700, H03D 324
Patent
active
055984479
ABSTRACT:
An integrated circuit device is comprised of an input interface, a PLL unit, a processing unit and an output interface. The input interface operates in response to an external clock signal for sequentially receiving input data in synchronization with an external synchro signal. The PLL unit includes an internal clock source operative in phase-locked manner according to the external synchro signal for generating an internal clock signal which is faster than the external clock signal. The processing unit operates in response to the internal clock signal for sequentially processing the input data. The output interface operates in response to the external synchro signal for sequentially outputting the processed data in synchronization with the external synchro signal.
REFERENCES:
patent: 4513427 (1985-04-01), Borriello et al.
patent: 4596026 (1986-06-01), Cease et al.
patent: 5099477 (1992-03-01), Taniguchi et al.
patent: 5233314 (1993-08-01), McDermott et al.
Tse Young T.
Yamaha Corporation
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