Active solid-state devices (e.g. – transistors – solid-state diode – Combined with electrical contact or lead – Wire contact – lead – or bond
Reexamination Certificate
1999-12-06
2001-05-08
Clark, Sheila V. (Department: 2815)
Active solid-state devices (e.g., transistors, solid-state diode
Combined with electrical contact or lead
Wire contact, lead, or bond
C257S781000
Reexamination Certificate
active
06229221
ABSTRACT:
BACKGROUND OF THE INVENTION
The invention relates to an integrated circuit device comprising:
an active circuit provided in an active circuit area at a surface of a semiconductor body, said active circuit comprising active circuit devices, an interconnect structure comprising at least one patterned metal layer disposed in overlying relationship relative to the active circuit devices and a layer of passivating material disposed atop the interconnect structure,
a plurality of bond pads, each providing a wire-bonding region for bonding a wire, said bond pads being disposed substantially over the active circuit area,
electrical connections between the bond pads and the active circuit devices, said electrical connections extending from a circuit-connecting region provided by the bond pads and passing through the layer of passivating material.
An integrated circuit device of the type mentioned in the opening paragraph is known from EP-A-0,587,442. The integrated circuit device described therein comprises active circuit devices provided in an active circuit area at a surface of a semiconductor body. In overlying relationship relative to the active circuit devices, an interconnect structure is disposed, which is provided with a layer of passivating material. On top of the layer of passivating material a plurality of bond pads is disposed which extend substantially over the active circuit area and are electrically connected to the active circuit devices through the layer of passivating material. In order to counteract the occurrence of damage to the active circuit area of the integrated circuit device due to forces exerted during bonding of a wire to each one of the bond pads, the layer of passivating material is composed of a polyimide. Alternatively, the layer of passivating material may be a polyimide layer on top of a silicon nitride or a silica layer. The polyimide absorbs and controls stresses transmitted from the bond pads to the active circuit area and, hence, provides for stress relief during wire bonding. Preferably, special requirements are imposed on certain physical properties of the polyimide applied, such as modulus of elasticity, coefficient of thermal expansion and dielectric constant.
A disadvantage of the known integrated circuit device is that, whereas conventional integrated circuit devices having bond pads arranged peripherally outside of the active circuit area rely on an inorganic passivating material, application of an additional or substitutive organic passivating material, i.e. a polyimide, is needed for stress relief in case the bond pads are disposed substantially over the active circuit area, thereby increasing the complexity of the integrated circuit device and its manufacturing process.
SUMMARY OF THE INVENTION
It is an object of the invention to provide an integrated circuit device of the kind mentioned in the opening paragraph, which can withstand the forces exerted during wire bonding and, hence, counteract the occurrence of damage to the active circuit without an increase in device and process complexity.
According to the invention, this object is achieved in that
the circuit-connecting region of the bond pads is situated substantially outside of the wire-bonding region of the bond pads,
the layer of passivating material substantially consists of inorganic material,
the layer of passivating material beneath the wire-bonding region of the bond pads is substantially free from interruptions,
the layer of passivating material and the bond pads have thicknesses that jointly counteract the occurrence of damage to the active circuit during bonding of the wire.
It has been found experimentally that the thicknesses of the bond pads and the layer of passivating material consisting substantially of conventional inorganic material can be chosen to be such that the integrated circuit device is capable of withstanding the forces exerted during wire bonding, provided the circuit-connecting region of the bond pads is situated substantially outside of the wire-bonding region of the bond pads and the layer of passivating material is substantially free from interruptions beneath the wire-bonding region of the bond pads. In this way, application of an additional or substitutive organic passivating material such as a polyimide is not required for stress relief during wire bonding.
An embodiment of the integrated circuit device according to the invention is characterized in that the wire-bonding region of the bond pads and the circuit-connecting region of the bond pads are part of one common layer. The use of a common layer for both the wire-bonding region of the bond pads and the circuit-connecting region of the bond pads reduces the complexity of the integrated circuit device and its manufacturing process.
An embodiment of the integrated circuit device according to the invention is characterized in that the wire-bonding region of the bond pads is located substantially at the periphery of the active circuit area. In this way, wires electrically connecting the bond pads disposed over the active circuit area to an external lead structure provided by a package surrounding the integrated circuit device, can be kept as short as possible. Consequently, the resistance of the wires and the associated tension losses during operation of the integrated circuit device can be minimized.
An embodiment of the integrated circuit device according to the invention is characterized in that the bond pads comprise aluminium. Aluminium, either pure or as an alloy with a few percent of silicon and/or copper, exhibits a relatively low electrical resistivity compared to other metals. Furthermore, the application of pure or alloyed aluminium for the bond pads is compatible with the processing of previously applied metal layers, since the latter are commonly composed of pure or alloyed aluminium as well.
An embodiment of the integrated circuit device according to the invention is characterized in that the layer of passivating material comprises silicon nitride. Silicon nitride is frequently used as a passivating material, because it provides an impermeable barrier to moisture and mobile impurities, such as sodium, and in addition forms a tough coat that protects the integrated circuit device against scratching.
An embodiment of the integrated circuit device according to the invention is characterized in that the layer of passivating material has a thickness of at least 1.2 &mgr;m and that the bond pads have a thickness of at least 1.1 &mgr;m. It has been found experimentally that an integrated circuit device is able to withstand the forces exerted during wire bonding if the layer of passivating material comprising silicon nitride has a thickness of at least 1.2 &mgr;m and the bond pads comprising aluminium have a thickness of at least 1.1 &mgr;m.
An embodiment of the integrated circuit device according to the invention is characterized in that the layer of passivating material has a thickness in the range of about 1.4 to 2.0 &mgr;m and that the bond pads have a thickness in the range of about 2 to 3 &mgr;m. In order to attain an overall process yield equal to that obtained during manufacturing conventional integrated circuit devices having the bond pads arranged peripherally outside of the active circuit area, it is advantageous to apply the layer of passivating material comprising silicon nitride and the bond pads comprising aluminium in thicknesses lying in the above mentioned ranges. Moreover, from a process technical viewpoint it is desirable to keep the thicknesses as small as possible.
An embodiment of the integrated circuit device according to the invention is characterized in that the wire comprises gold. Gold has a relatively high electrical conductivity and is relatively easy to process compared to, for instance, aluminium.
REFERENCES:
patent: 5365112 (1994-11-01), Ohshsima
patent: 5539244 (1996-07-01), Mori et al.
patent: 5719448 (1998-02-01), Ichikawa
patent: 5773899 (1998-06-01), Zambrano
patent: 5925931 (1999-07-01), Yammamoto
patent: 5962918 (1999-10-01), Kimura
patent: 6150725 (
Huiskamp Lodewijk P.
Kloen Hendrik K.
Biren Steven R.
Clark Sheila V.
U.S. Philips Corporation
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