Integrated circuit design system and method for reducing and...

Details Integrated circuit design system and method for reducing and... Integrated circuit design system and method for reducing and...

2005-06-14

2005-06-14

Whitmore, Stacy A. (Department: 2812)

Computer-aided design and analysis of circuits and semiconductor

Nanotechnology related integrated circuit design

Reexamination Certificate

active

06907590

ABSTRACT:
A system, method and program product for designing integrated circuits. A design of an integrated circuit (IC) is analyzed to identify the longest path for each cell pair. The total path delay of each identified longest path is calculated. Net delays are calculated for each cell pair. A crosstalk overhead delay is calculated for each identified longest path using a stochastic model. The crosstalk overhead of each longest path is added to the calculated path delays. The circuit is redesigned to eliminate any path wherein the delay exceeds a maximum accepted delay. The stochastic model may be a tree-like structure derived from several completed integrated circuit designs, in particular from cell placement and wiring for each completed IC. The tree-like stochastic model corresponds crosstalk delays to technology wiring factors.

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