Electricity: electrical systems and devices – Housing or mounting assemblies with diverse electrical... – For electronic systems and devices
Utility Patent
1998-03-12
2001-01-02
Gaffin, Jeffrey (Department: 2841)
Electricity: electrical systems and devices
Housing or mounting assemblies with diverse electrical...
For electronic systems and devices
C361S764000, C361S765000, C361S767000, C361S807000, C257S698000, C257S697000, C257S773000, C257S774000, C174S250000, C174S255000, C174S266000, C228S180220
Utility Patent
active
06169663
ABSTRACT:
TECHNICAL FIELD OF THE INVENTION
The present invention relates to the field of electronic circuit interconnection, and more specifically, to a new apparatus and method for electrically connecting integrated circuits to other electrical circuits, such as printed circuit boards or flexible circuits.
BACKGROUND OF THE INVENTION
Integrated circuits typically are packaged within hermetically sealed packages from which a multiplicity of pins extend. These pins are typically electrically connected to the signal, power, and ground lines of the integrated circuit, and provide a means by which the integrated circuit can be electrically connected to other electrical circuits. For example, integrated circuits can be electrically connected to one another to form larger circuits by soldering the pins of the integrated circuits to “plated through holes” (PTH) in a printed circuit board. Plated through holes are physical holes through the printed circuit board. The exterior of the plated through holes is comprised of an electrically conductive material. Each of these plated through holes may be electrically coupled to other electronic devices on the printed circuit board by interconnect lines in the printed circuit board. The soldering process forms the electrical and mechanical connection necessary to interconnect the integrated circuits and the printed circuit board. Similarly, in the case of multilayer printed circuit boards, plated through holes provide for the electrical connection between the electrical layers of the printed circuit board.
The above-described methods of interconnecting individually packaged integrated circuits using printed circuit boards imposes limits on the packaging density that can be achieved, since both the individual packaging of the integrated circuits and soldering methods used to form connections have inherent inefficiencies associated with them. The inability to provide a higher packaging density requires unnecessarily long interconnect lines in the printed circuit board, which adversely affects the inter-circuit signal speed and quality.
One means by which packaging density has been improved is through a method in which unpackaged integrated circuits are placed directly onto printed circuit boards by using soft “flying” gold lead wires attached to the bonding pads, or bond pads, of the integrated circuit to form the electrical and mechanical connection between the integrated circuit and the printed circuit board. This interconnection is achieved by inserting the flying gold leads into the plated through holes in the printed circuit board, and compressing the flying gold leads within the holes so that they buckle and contact the electrically conductive walls of the plated through holes, thereby forming the mechanical and electrical connections between the integrated circuit and the printed circuit board, or between multiple layers of a multilayer printed circuit board. This “pressing” method is fully described in U.S. Pat. No. 5,054,192 to Cray et al., which is incorporated herein by reference.
According to the pressing method described by U.S. Pat. No. 5,054,192 (“the '192 patent”), the flying gold leads are first secured to the integrated circuit board by thermosonically bonding them to the bonding pads of the integrated circuit so that they extend substantially perpendicularly from the integrated circuit. The integrated circuit is then positioned relative to the printed circuit board (which is secured to a lower caul plate) so that the flying gold leads each extend through a corresponding plated through hole in the printed circuit board, as shown in FIG.
1
. Pressure is then applied to the upper surface of the integrated circuit through an upper plate, so that the flying gold leads are forced to buckle within the plated through holes in the printed circuit board, as shown in FIG.
2
. Once the flying gold leads buckle, they contact the electrically conductive inner surface of the plated through holes, and electrically and mechanically connect the integrated circuit to the printed circuit board.
Although the invention of the '192 patent enables higher packaging densities to be achieved, there are several disadvantages associated with the fact that mechanical pressure must be applied to the integrated circuit and printed circuit board to force the flying gold leads to buckle within the plated through holes in the printed circuit board. First, the application of pressure to the integrated circuit results in compression of the flying gold leads directly onto the bond pads. Typically, the bond pads are not designed to withstand these types of mechanical forces. The bond pads themselves are often mechanically fragile, and mechanical loading on the surface of the bond pads can cause cratering, pad lift defects, where the pad lifts at least partially away from the surface of the integrated circuit, or both. Bond pad cratering may result in further mechanical and electrical fragility in the bond pad, making the bond pad more susceptible to future failure. Pad lift defects may result in electrical shorts.
Another problem associated with the pressing method described in the '192 patent is that it is essential that each of the flying gold leads be precisely perpendicular to the integrated circuit and printed circuit board, and be of a precise and uniform length. Any deviation may result in inconsistencies in the electrical connections among the flying gold leads, and adversely affect performance.
Another significant disadvantage of the invention of the '192 patent is that it makes removal and replacement of integrated circuits often difficult. To remove an integrated circuit, each and every gold lead must be dislodged from the corresponding plated through hole in the printed circuit board. This is accomplished by stamping or pressing out each gold lead, which is the reverse of the process used to buckle the gold lead. This forceful removal will result in damage to the flying gold leads, and will likely also result in damage to the bonding pads, the integrated circuit, and/or the plated through holes in the printed circuit board.
Accordingly, a need currently exists for an improved apparatus and method for interconnecting electronic circuit assemblies such as integrated circuits, printed circuit boards, including multilayer printed circuit boards, and flexible circuits.
SUMMARY OF THE INVENTION
The present invention provides such an improved method and apparatus. One such method is for electrically and mechanically connecting a first and second electronic circuit assembly. The first electronic circuit assembly includes a first surface having a plurality of leads extending therefrom and a second opposite surface. The plurality of leads each have a seating portion that is in communication with the first surface, and a stem portion extending from the seating portion. The second electronic circuit assembly includes a plurality of plated through holes therein corresponding to the plurality of leads of the first electronic circuit assembly. The steps of the method include positioning the second electronic assembly so that a lower surface of the second electronic assembly rests on the seating portion of the leads of the first electronic assembly, and so that the stem portion of each of the leads are positioned within the corresponding plated through holes in the second electronic assembly. An electrically conductive epoxy adhesive is then dispensed into each of the plated through holes having the stem portion of the leads therein, and cured to form a solid electrical and mechanical connection between the first and second electronic circuit assemblies.
REFERENCES:
patent: 5054192 (1991-10-01), Cray et al.
patent: 5450290 (1995-09-01), Boyko et al.
patent: 5460531 (1995-10-01), Vivio
patent: 5468681 (1995-11-01), Pasch
patent: 5483421 (1996-01-01), Gedney et al.
patent: 5907903 (1999-06-01), Ameen et al.
Foster David
Fulghum Roger
Gaffin Jeffrey
Ley John R.
Medallion Technology, LLC
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