Miscellaneous active electrical nonlinear devices – circuits – and – Specific signal discriminating without subsequent control – By amplitude
Reexamination Certificate
2000-08-30
2003-01-28
Wells, Kenneth B. (Department: 2816)
Miscellaneous active electrical nonlinear devices, circuits, and
Specific signal discriminating without subsequent control
By amplitude
C327S563000, C330S253000
Reexamination Certificate
active
06512400
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention relates generally to integrated circuit comparators, and, more particularly, to integrated circuit comparators for use in low voltage applications.
2. Description of the Related Art
A conventional CMOS voltage comparator
10
is illustrated in FIG.
1
. The CMOS voltage comparator
10
includes a differential amplifier II and an inverter
12
. A reference voltage VR is applied to one input of the differential amplifier
11
, i.e., a gate terminal of a transistor
21
, and an input voltage V
1
to be compared to the reference voltage is applied to another input to the differential amplifier
11
, i.e., a gate terminal of a transistor
22
. In operation, when the input voltage V
1
becomes higher than the reference voltage VR, an output signal on a line
25
switches from a low voltage, for example, a logic level “zero,” to a high voltage, for example, a logic level “one.” When the input voltage V
1
becomes lower than the reference voltage VR, the transistor
22
turns off, the input signal to the inverter
12
becomes high, and the output signal VOUT changes from a high state to a low state. In this manner, the input voltage V
1
is compared to the reference voltage VR. Ideally, the transition between logic levels at the output line
25
will occur when V
1
is equal to VR, there being no offset voltage. Also ideally, the transition between logic levels will occur with no time delay, the speed of the comparator
10
being very fast. These ideals are rarely, if ever, attained.
Comparators are widely used in integrated circuits, for example, in analog-to-digital converters and as voltage signal receivers on interconnections and clock distribution lines. Two primary concerns in the application of comparators are the mismatch of transistor characteristics, resulting in voltage offsets, and the speed of operation, or time delay in operation. Because one of the basic components of a comparator is a differential amplifier, which typically involves three transistors coupled in series, operation of the comparator becomes slower and less reliable as power supply voltages are reduced. Lower power supply voltages result in lower magnitudes of the excess of gate voltage above the threshold voltage of the MOS transistors. The switching current, or saturation current, depends upon the square of this excess gate voltage:
Ids
=(
uCo
) (
W/L
) (
VGS−VT
)
2
/2
The time, t, required to discharge a capacitor with charge Q can be estimated as:
t=Q/Ids
If the excess of gate-to-source voltage above threshold (VGS−VT) is small, the delay time will be long, and the circuits will operate at low switching speeds.
The inverter
12
of
FIG. 1
is a conventional single-ended input, single-ended output, CMOS amplifier. To illustrate the operation of the inverter amplifier
12
, assume a power supply potential
26
is 1.6 volts, i,e., VDD equals 1.6 volts DC. Assume further that the quiescent input and output voltages are at VDD/2, or 0.8 volts DC. Both the PMOS transistor
28
and the NMOS transistor
30
are assumed, for purposes of illustration, to have matching characteristics and matching threshold voltages of 0.5 volts. That is, VTN equals 0.5 volts, and VTP equals −0.5 volts. In practice, different sizes or W/L ratios can be used to compensate for the fact that the transistors do not have matching characteristics. Assuming the stated values, the turn-on time for the inverter amplifier
12
is approximately three nanoseconds, whereas, the turn-off time for the inverter amplifier
12
is on the order of tens of nanoseconds.
Low switching speeds and circuit functional failure at low power supply voltages are even more acute in differential amplifiers that form part of a comparator circuit, such as the comparator circuit
10
of FIG.
1
. In the differential amplifier
11
of the comparator circuit
10
of
FIG. 1
, three devices, transistors
21
,
23
,
24
, are coupled in series between the power supply potential
26
and the power supply ground
29
. Also, three other transistors
22
,
24
,
27
are coupled in series between the power supply potential
26
and the power supply ground
29
. Each of the transistors
21
,
22
,
23
,
24
,
27
needs a reasonable magnitude of excess gate voltage above threshold to operate properly. With the power supply potential
26
equal to 1.5 volts DC, the turn-on time for the comparator
10
is just over one nanosecond, while the turn-off time is on the order of 3-4 nanoseconds. When the power supply potential
26
is dropped to 1.2 volts DC, the turn-on time lengthens to approximately 4 nanoseconds, while the turn-off time lengthens to approximately 6 nanoseconds. When the power supply potential
26
is dropped even further, to 0.9 volts DC, the turn-on time for the comparator
10
is again approximately 4 nanoseconds, but the turn-off time approaches 10 nanoseconds, becoming so long that the comparator
10
begins to function incorrectly.
The present invention is directed to eliminating, or at least reducing the effects of, some or all of the aforementioned problems.
SUMMARY OF THE INVENTION
In one aspect of the present invention, an integrated circuit comparator comprises a differential amplifier, a source follower circuit coupled to a gate terminal of a first transistor in the differential amplifier, and an output circuit. A single or multiple source follower circuits may be utilized as desired.
In another aspect of the present invention, an integrated circuit comparator comprises a differential amplifier, a first power supply line coupled to the differential amplifier, the first power supply line adapted to receive a positive power supply potential of approximately 0.9 volts, a source follower circuit coupled to a gate terminal of a first transistor in the differential amplifier, and an output circuit. A single or multiple source follower circuit may be utilized as desired.
In yet another aspect of the present invention, a differential amplifier comprises first and second transistors coupled in electrical series between a first node and a second node, third and fourth transistors coupled in electrical series between the first node and the second node, and a source follower circuit coupled to a gate terminal of the first transistor, the second transistor adapted to receive a first input signal, and the fourth transistor adapted to receive a second input signal.
In yet another aspect of the present invention, a low voltage amplifier comprises a first transistor and a second transistor coupled in electrical series between first and second power supply nodes, a source follower circuit coupled to a gate terminal of the first transistor, and an input line coupled to the source follower circuit and coupled to a gate terminal of the second transistor.
In another aspect of the present invention, a low voltage amplifier comprises first and second transistors coupled in electrical series between first and second power supply nodes, a third transistor coupled between the first power supply node and a gate terminal of the first transistor, a current source device coupled between the gate terminal of the first transistor and the second power supply node, and an input node coupled to a gate terminal of the third transistor and to a gate terminal of the second transistor.
REFERENCES:
patent: 4461964 (1984-07-01), Shiotari
patent: 5241502 (1993-08-01), Lee et al.
patent: 5600275 (1997-02-01), Garavan
patent: 5646571 (1997-07-01), Ohashi
patent: 5831458 (1998-11-01), Nakagawa
patent: 5909127 (1999-06-01), Pearson et al.
patent: 5939926 (1999-08-01), Uber
LMC7221—Tiny CMOS Comparator with Rail-to-Rail Input and Open Drain Output, Sep. 1998.
Micro)n Technology, Inc.
Wells Kenneth B.
Williams Morgan & Amerson
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