Semiconductor device manufacturing: process – Formation of semiconductive active region on any substrate – On insulating substrate or layer
Reexamination Certificate
2007-10-23
2007-10-23
Malsawma, Lex (Department: 2823)
Semiconductor device manufacturing: process
Formation of semiconductive active region on any substrate
On insulating substrate or layer
C257SE21563
Reexamination Certificate
active
11279063
ABSTRACT:
An Integrated Circuit (IC) chip that may be a bulk CMOS IC chip with silicon on insulator (SOI) Field Effect Transistors (FETs) and method of making the chip. The IC chip includes areas with pockets of buried insulator strata and FETs formed on the strata are SOI FETs. The SOI FETs may include Partially Depleted SOI (PD-SOI) FETs and Fully Depleted SOI (FD-SOI) FETs and the chip may include bulk FETs as well. The FETs are formed by contouring the surface of a wafer, conformally implanting oxygen to a uniform depth, and planarizing to remove the Buried OXide (BOX) in bulk FET regions.
REFERENCES:
patent: 6403435 (2002-06-01), Kang et al.
patent: 6414355 (2002-07-01), An et al.
patent: 6548369 (2003-04-01), van Bentum
Gluschenkov Oleg
Hsu Louis C.
Joshi Rajiv V.
Karra, Esq. Satheesh K.
Law Office of Charles W. Peterson, Jr.
Malsawma Lex
Perez-Pineiro, Esq. Rafael
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