Integrated circuit chip packaging method

Details Integrated circuit chip packaging method Integrated circuit chip packaging method

1997-11-04

1998-11-17

Niebling, John

Semiconductor device manufacturing: process

With measuring or testing

Packaging or treatment of packaged semiconductor

438115, 438127, G01R 3126, H01L 2166, H01L 2144, H01L 2148, H01L 2150

Patent

active

058375589

ABSTRACT:
An improved method for packaging an integrated circuit chip is disclosed. In accordance with the invention, an integrated circuit chip (12) is mounted on a leadframe (18) having a plurality of leads (20). The integrated circuit chip is electrically connected to the leadframe with wire bonds (22). An encapsulant (26) is then molded around the integrated circuit chip and the leadframe. In a dry bake step, moisture is removed from the encapsulant (26) for dry shipment of the integrated circuit chip subsequent to the molding step. The encapsulant (26) is cured simultaneously with the dry bake step, thus reducing the time and power required to produce the integrated circuit chip package.

REFERENCES:
patent: 4017495 (1977-04-01), Jaffe et al.
patent: 4468411 (1984-08-01), Sloan et al.
patent: 4558510 (1985-12-01), Tani et al.
patent: 5668405 (1997-09-01), Yamashita et al.

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