Integrated circuit chip package having a ring-shaped silicon...

Details Integrated circuit chip package having a ring-shaped silicon... Integrated circuit chip package having a ring-shaped silicon...

2005-10-25

2009-02-10

Clark, Jasmine J (Department: 2815)

Active solid-state devices (e.g., transistors, solid-state diode

Housing or package

For plural devices

C257S532000, C257S784000, C257S786000, C257SE27045, C257SE27048, C361S763000, C361S766000, C361S734000

Reexamination Certificate

active

07489035

ABSTRACT:
A semiconductor package features a ring-shaped silicon decoupling capacitor that reduces simultaneous switching noise. The decoupling capacitor is fabricated on a substrate from silicon using a wafer fabrication process and takes the form of an annular capacitive structure that extends around a periphery of a substrate-mounted integrated circuit (IC). The decoupling capacitor has a reduced thickness on or below a chip level and takes the place of a conventional power/ground ring. Therefore, the decoupling capacitor can be disposed within the package without increasing the thickness and the size of the package. The decoupling capacitor may be coupled to various power pins, allowing optimum wire bonding, shortened electrical connections, and reduced inductance. Bonding wires connected to the decoupling capacitor have higher specific resistance, lowering the peak of the resonance frequency and thereby reducing simultaneous switching noise.

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Patrik Larsson, “Resonance and Damping in CMOS Circuits with On-Chip Decoupling Capacitance”, IEEE Transactions on Circuits and System vol. 45, No. 8, 1998. p. 849-858.

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