Active solid-state devices (e.g. – transistors – solid-state diode – Gate arrays – With particular signal path connections
Reexamination Certificate
2006-03-23
2008-08-12
Menz, Douglas M (Department: 2891)
Active solid-state devices (e.g., transistors, solid-state diode
Gate arrays
With particular signal path connections
C257S700000, C438S106000, C438S128000
Reexamination Certificate
active
07411228
ABSTRACT:
An integrated circuit chip includes a substrate, a device layer, an interconnection layer, a sealing base layer and a sealing ring stack layer. The substrate has a sealing region and a chip region. The sealing region is disposed around the chip region. The device layer is disposed within the chip region. The interconnection layer is disposed over and connected with the device layer. The sealing base layer is disposed within the sealing region. The sealing ring stack layer is disposed over and connected with the sealing base layer. A manufacturing process of the integrated circuit chip is also disclosed.
REFERENCES:
patent: 2002/0125577 (2002-09-01), Komada
patent: 2005/0098893 (2005-05-01), Tsutsue et al.
patent: 2005/0151239 (2005-07-01), Lee
patent: 2005/0179213 (2005-08-01), Huang et al.
Birch & Stewart Kolasch & Birch, LLP
Menz Douglas M
Via Technologies Inc.
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