Integrated circuit cell library

Details Integrated circuit cell library Integrated circuit cell library

2005-05-10

2005-05-10

Thompson, A. M. (Department: 2825)

Computer-aided design and analysis of circuits and semiconductor

Nanotechnology related integrated circuit design

C716S030000, C716S030000, C716S030000

Reexamination Certificate

active

06892373

ABSTRACT:
According to the invention, an ASIC cell library for use in creation of custom integrated circuits is disclosed. The ASIC cell library includes some first cells and some second cells. Each of the second cells includes two or more kernel cells. The ASIC cell library is at least 5% comprised of second cells. In various embodiments, the ASIC cell library could be 10% or more, 20% or more, 30% or more, 40% or more, 50% or more, 60% or more, 70% or more, 80% or more, 90% or more, or 95% or more comprised of second cells.

REFERENCES:
patent: 4792909 (1988-12-01), Serlet
patent: 5031111 (1991-07-01), Chao et al.
patent: 5040139 (1991-08-01), Tran
patent: 5051917 (1991-09-01), Gould et al.
patent: 5128871 (1992-07-01), Schmitz
patent: 5162666 (1992-11-01), Tran
patent: 5200907 (1993-04-01), Tran
patent: 5225991 (1993-07-01), Dougherty
patent: 5299204 (1994-03-01), Daniel
patent: 5349659 (1994-09-01), Do et al.
patent: 5406497 (1995-04-01), Altheimer et al.
patent: 5432707 (1995-07-01), Leung
patent: 5526276 (1996-06-01), Cox et al.
patent: 5548231 (1996-08-01), Tran
patent: 5572437 (1996-11-01), Rostoker et al.
patent: 5596742 (1997-01-01), Agarwal et al.
patent: 5649165 (1997-07-01), Jain et al.
patent: 5712806 (1998-01-01), Hennenhoefer et al.
patent: 5724251 (1998-03-01), Heavlin
patent: 5734582 (1998-03-01), Bertolet et al.
patent: 5754826 (1998-05-01), Gamal et al.
patent: 5780883 (1998-07-01), Tran et al.
patent: 5796128 (1998-08-01), Tran et al.
patent: 5801551 (1998-09-01), Lin
patent: 5805462 (1998-09-01), Poirot et al.
patent: 5859547 (1999-01-01), Tran et al.
patent: 5867396 (1999-02-01), Parlour
patent: 5894227 (1999-04-01), Acuff
patent: 5953519 (1999-09-01), Fura
patent: 5987086 (1999-11-01), Raman et al.
patent: 6051031 (2000-04-01), Shubat et al.
patent: 6173435 (2001-01-01), Dupenloup
patent: 6184718 (2001-02-01), Tran et al.
patent: 6185719 (2001-02-01), Sako
patent: 6205572 (2001-03-01), Dupenloup
patent: 6243849 (2001-06-01), Singh et al.
patent: 6263483 (2001-07-01), Dupenloup
patent: 6275973 (2001-08-01), Wein
patent: 6282695 (2001-08-01), Reddy et al.
patent: 6286128 (2001-09-01), Pileggi et al.
patent: 6288593 (2001-09-01), Tran et al.
patent: 6289491 (2001-09-01), Dupenloup
patent: 6289498 (2001-09-01), Dupenloup
patent: 6292931 (2001-09-01), Dupenloup
patent: 6295636 (2001-09-01), Dupenloup
patent: 6313666 (2001-11-01), Yamashita et al.
patent: 6356112 (2002-03-01), Tran et al.
patent: 6359468 (2002-03-01), Park et al.
patent: 6467074 (2002-10-01), Katsioulas et al.
patent: 6526543 (2003-02-01), Rosser
patent: 6532581 (2003-03-01), Toyonaga et al.
patent: 6536028 (2003-03-01), Katsioulas et al.
patent: 6557145 (2003-04-01), Boyle et al.
patent: 6564361 (2003-05-01), Zolotykh et al.
patent: 6564364 (2003-05-01), Dahl et al.
patent: 6588006 (2003-07-01), Watkins
patent: 6598209 (2003-07-01), Sokolov
patent: 6735742 (2004-05-01), Hatsch et al.
patent: 6769109 (2004-07-01), Osann et al.
patent: 6816997 (2004-11-01), Teh et al.
patent: 20020069396 (2002-06-01), Bhattacharya et al.
patent: 20020087939 (2002-07-01), Greidinger et al.
patent: 20020178432 (2002-11-01), Kim et al.
patent: 20020194575 (2002-12-01), Allen et al.
patent: 20030085738 (2003-05-01), Maki et al.
patent: 20030145288 (2003-07-01), Wang et al.
patent: 20030200510 (2003-10-01), Whitaker et al.
patent: 20030204822 (2003-10-01), Whitaker et al.
patent: 20040025136 (2004-02-01), Carelli, Jr.
Jambek et al., “Standard cell library development”, Nov. 22-24, 1999 , Microelectronics, 1999. ICM '99. The Eleventh International Conference on , pp.: 161-163.*
Karunaratne et al., “An advanced library format for ASIC design”, May 2-5, 2004 , Electrical and Computer Engineering, 2004. Canadian Conference on , vol.: 3 , pp.: 1827-1830 vol. 3.*
Onodera et al., “P2Lib: process-portable library and its generation system”, May 5-8, 1997 , Custom Integrated Circuits Conference, 1997., Proceedings of the IEEE 1997 , pp.: 341-344.*
Onodera et al., “ASIC design methodology with on-demand library generation”, Jun. 14-16, 2001, VLSI Circuits, 2001. Digest o Technical Papers. 2001 Symposium on , pp.: 57-60.*
Yano, Kazuo et al. “Lean Integration: Achieving a Quantum Leap in Performance and Cost of Logic LSIs”IEEE 1994 Custom Integrated Circuits Conference, 1994, pp. 26.5.1-26.5.4.
Devadas, S. Optical Layout Via Boolean Satisfiability. 1989 IEEE International Conference on Computer-Aided Design Nov. 5, 1989. pp. 294-297.
Falkowski, B.J. et al., Efficient Algorithms For the Calculation of Arithmetic Spectrum from OBDD and Synthesis of OBDD from Arithmetic Spectrum for Incompletely Specified Boolean Functions 1994 IEEE International Symposium on Circuits and Systems, May 30, 1994, vol. 1, pp. 197-200.
Method for Identifying Technology Primitive in Logic IBM Technical Disclosure Bulletin, May 1992 Vo. 34, No. 12, pp. 359-361.
Upton, M. et al. Integrated Placement for Mixed Macro Cell and Standard Cell Designs Proceedings of 27th ACM/IEEE Design Automation Conference, Jun. 24, 1990, pp. 32-35.
Fletcher, William I.,An Engineering Approach to Digital Design, MSI and LSI Circuits and Their Applications, 1980, Prentice-Hall, Inc., Englewood Cliffs, NJ, pp. 210-226.

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