Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
Reexamination Certificate
2000-06-29
2002-08-20
Thomas, Tom (Department: 2811)
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Having insulated electrode
C257S302000
Reexamination Certificate
active
06437385
ABSTRACT:
BACKGROUND OF THE INVENTION
1. Field of the Invention
The present invention generally relates to capacitors formed in integrated circuit devices and, more particularly, to the formation of capacitors with relatively large capacitance values at increased manufacturing yields.
2. Description of the Prior Art
Numerous recent advances in integrated circuit designs and increases in integration density have contributed to substantial increases in the clock speed at which the integrated circuits can be reliably operated. Clock rates of 500 MHz are now common and clock rates of 1 GHz or higher are foreseeable within the next few years, However, increases in integration density and scaling of active devices to smaller sizes has required operation at lower voltages for numerous reasons including power dissipation and breakdown voltage. Reduced voltage operation, however, also reduces noise margins. At the same time, increased proximity of active devices and conductors has increased the likelihood of signal coupling between elements of the integrated circuit and reflection of switching noise into the power supply and provided to the active devices on the chip.
Thus, each increase in integrated circuit performance is accompanied by a requirement for increased bypass or decoupling capacitance on the chip allowing switching noise and other noise to be shunted to ground. Off-chip capacitances are ineffective for this purpose at current levels of performance due to the length and number of connections required and the attendant signal propagation time, resistive voltage drops and inductance of the connection. However, as integration density increases, chip space for large capacitors is less readily available.
Numerous capacitor designs are known for providing increased capacitance by increasing area of conductive plates and reducing dielectric thickness. However, at relatively low levels of capacitor structure complexity, the formation of connections to the capacitor plates becomes complicated and compromises manufacturing yield. While some techniques of chip repair are known and widely practiced, the repair of a complex capacitor structure is not generally possible. Providing redundant structures is not generally feasible in view of the chip area required and the likelihood that processing which permitted a defect in one capacitor may cause a defect in other capacitors formed in the same process. Provision of separate processes for separate complex capacitor structures is not economically feasible due to the number of process steps that would be multiplied. Thus, a defect in capacitor formation can cause loss of the entire chip.
SUMMARY OF THE INVENTION
It is therefore an object of the present invention to provide a structure for a large value capacitor and a method by which it can be reliably formed using relatively small chip area.
It is another object of the invention to provide a process-tolerant structure for a large value capacitor including reliably constructed contacts to the electrodes or plates thereof.
It is a further object of the invention to provide an arrangement of large value capacitors which provides for repair while reducing the likelihood that repair will be required and increasing operating margins.
In order to accomplish these and other objects of the invention, a capacitor structure formed in a trench in a semiconductor substrate is provided including a plurality of conductive films separated by a plurality of insulating films, alternating ones of some of the conductive films comprising different materials, and an arrangement such a selective recessing or selective formation of blocking diodes for selectively forming connections to respective ones of said different materials.
In accordance with another aspect of the invention, a method of making selective connections to selected ones of a plurality of conductive films of different materials separated by insulating films is provided comprising steps of forming an aperture through said plurality of conductive films and said insulating films, and filling said aperture with conductive material which selectively forms connections with said different materials.
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Bertin Claude L.
Maffitt Thomas M.
Pricer Wilbur D.
Tonti William R.
Chadurjian Mark F.
Nguyen Cuong Quang
Thomas Tom
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