Integrated circuit arrangement with feature control

Details Integrated circuit arrangement with feature control Integrated circuit arrangement with feature control

2001-05-31

2003-09-16

Tran, Anh (Department: 2819)

Electronic digital logic circuitry

Multifunctional or programmable

C326S038000, C326S041000

Reexamination Certificate

active

06621293

ABSTRACT:

FIELD OF THE INVENTION
The present device relates generally to integrated circuit devices and, in particular, to an integrated circuit arrangement that is reconfigurable to operate in alternate modes, for use with various CPUs and peripherals.
BACKGROUND OF THE INVENTION
Programmable integrated circuit devices have long played a key role in the design of digital hardware. Most are general-purpose chips that can be configured for a wide variety of applications. Some of these integrated circuit devices include, for example, Programmable Read-only Memory (PROM), Erasable Read-only Memory (EPROM), Programmable Logic Devices (PLDs), Field Programmable Gate Arrays (FPGAs) and Mask Programmable Gate Arrays (MPGAs).
FPGAs, in particular, are not only programmable but are actually computing integrated circuit devices that can implement virtually any digital circuit in hardware. FPGAs provide an end user with ability to directly configure the logic structure on the chip without the need for an integrated circuit fabrication facility. FPGAs can also be reprogrammed simply by loading them with a different “hardware program.” The reprogramming feature of the FPGA facilitates implementing many processing algorithms with performance that simulates dedicated hardware while retaining the flexibility of dynamically reconfiguring the implementation when necessary. However, re-programming is time consuming and, depending on the application, using FPGAs can be expensive.
Another integrated circuit device used in computing is a universal asynchronous receiver/transmitter (UART) device. A UART is a data communications device that performs parallel-to-serial conversion of digital data. A UART communicates between parallel and serial forms by converting received data between parallel I/O devices, such as a local CPU, and serial I/O devices, such as POTS modems or other transmission lines. Most traditional UART devices can be programmed to operate at a selected baud rate, and the newer generation UARTs handle data communication more efficiently, to a great extent due to larger FIFO depths and improved flow control (fewer retries required and fewer waits for the internal FIFO to fill or empty). However, for many applications, reprogramming the functionality of a UART device in the field can be problematic because most of the hardwire connections of the UART are permanently configured at the factory before the device is shipped.
It would be highly desirable to have an arrangement of integrated circuits that is reconfigurable in the field to operate in alternate modes without adding additional hardware or expense.
SUMMARY OF THE INVENTION
Various aspects of the present invention are directed to facilitating efforts to reconfigure integrated circuit device functionality in the field. The present invention is exemplified in a number of implementations and applications, some of which are summarized below.
According to an example embodiment of the present invention, an arrangement of integrated circuits includes a reconfigurable integrated circuit configured and arranged to operate in one of a plurality of modes. The reconfigurable integrated circuit includes a register adapted to store data for temporary use, with each operating mode of the reconfigurable circuit being selectable in response to mode-selecting data code. An interface circuit is electrically connected to the reconfigurable integrated circuit and is adapted to present the mode-selecting data code to the reconfigurable integrated circuit. A selection circuit is adapted to enable the interface circuit to pass mode-selecting data to the reconfigurable integrated circuit. The selection circuit is also adapted to detect when a series of data writes to the register corresponds to the mode-selecting data code and, in response, to reconfigure the integrated circuit to operate in one of the plurality of modes.
A more particular implementation of the present invention provides a security feature that prohibits unauthorized attempts to reconfigure the integrated circuit when the selection circuit and the register do not detect an operative mode-selecting data code.
The above summary is not intended to describe each illustrated embodiment or every implementation of the present invention. The figures and detailed description that follow more particularly exemplify these embodiments.


REFERENCES:
patent: 6011407 (2000-01-01), New
patent: 6237054 (2001-05-01), Freitag, Jr.

Affiliated with

Also associated with

Rating

Integrated circuit arrangement with feature control does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Integrated circuit arrangement with feature control, we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Integrated circuit arrangement with feature control will most certainly appreciate the feedback.

Rate now

Comments { 0 }

Profile ID: LFUS-PAI-O-3104785