Electronic digital logic circuitry – Multifunctional or programmable – Significant integrated structure – layout – or layout...
Reexamination Certificate
2001-04-06
2002-12-17
Tokar, Michael (Department: 2819)
Electronic digital logic circuitry
Multifunctional or programmable
Significant integrated structure, layout, or layout...
C326S107000, C257S208000, C257S211000, C438S128000, C438S129000
Reexamination Certificate
active
06496035
ABSTRACT:
FIELD OF THE INVENTION
The invention relates generally to conductor routing among circuit elements in an integrated circuit. More particularly, the invention relates to structure and a method which facilitate changing circuit operation in any one of the conductor layers in an integrated circuit.
BACKGROUND OF THE INVENTION
Integrated circuits (“ICs”) typically have a substrate, an active region on the substrate containing a large plurality of circuit elements such a transistors, resistors, capacitors etc., and a region adjacent the active region which has a plurality of conductor layers and insulating layers interspersed between the conductor layers. The conductor layers each include a large number of conductor tracks which are used to provide power to the circuit elements, as well as for signal routing between the elements.
During design and testing of an integrated circuit, or even after an IC had been in production, it is often necessary or desirable to revise the circuit operation to remove faults or to otherwise improve circuit operation. At the most severe end of the spectrum of revisions, the changes may require modifications to the masks which define the content and arrangement of circuit elements on the substrate. More frequently, however, the designer has anticipated potential problems and has included sufficient circuit elements on the integrated circuit to fix the problem. For example, the designers may include a selection of buffer circuit elements to remove timing problems in the signal routing. It is then a matter of modifying the conductor routing so as to decouple and/or couple certain of the circuit elements so as to implement the fix.
Additionally, many chip designs incorporate an identification (“ID”) module which is readable by software. The purpose of the module ID is to allow software to identify the hardware and, based on the ID, configure the chip and the corresponding software. As the industry moves to systems on a chip design, where proven circuit modules are “plugged into” the IC, it will be desirable for each module to have a corresponding ID module.
When making a circuit fix/enhancement to a particular module, it will typically be desirable to change the output of the module ID circuit, so that software will read a different ID code reflecting the change.
Traditional implementations of ID modules is done by Register Transfer Level (“RTL”) implementation of a module ID register. In other implementations, the ID module is not a register at all, but simply constants which can be read by the software. In the case of a constant, the ID can not be changed by altering routing in one or more of the conductor layers, and a full new mask set may be required to implement the change in the ID. This is expensive in terms of cost of the mask set as well as in the schedule slippage required by the time to create new masks.
Other implementations allow the value of the module ID to be revised through changes in routing in the metal layers. However, in these known techniques, the required changes in the routing are typically in layers which are different than the layers used to implement the circuit fix which necessitated the revision of the module ID. Thus, additional mask changes are required.
SUMMARY OF THE INVENTION
Generally speaking, according to one aspect of the invention, an integrated circuit includes a plurality of circuit elements and a plurality of conductor tracks connected to the circuit elements, the plurality of conductor tracks being arranged in a stack of a plurality of conductor layers, the stack being bounded by first and second opposing outermost conductor layers. A cell includes a serpentine conductor track having a first end in the first outermost conductor layer and a second, opposing end in the second, opposing outermost conductor layer. The serpentine track extends successively from the first end to the second end through any conductor layers between the outermost conductor layers. The serpentine track further includes couplings which couple track portions of the serpentine conductor track, the couplings being alternately laterally offset from each other along the extent of the serpentine track through the conductor layers. The first end of the serpentine conductor track is coupled to a first of the circuit elements and the second end is coupled to a second of the circuit elements. Furthermore, the integrated circuit has one of (i) the serpentine conductor path forming a continuous electrical path between the first circuit element and the second circuit element, and (ii) the serpentine conductor path having a discontinuity in one of the conductor layers such that the first and second circuit elements are not coupled to each other and the integrated circuit further including a bridging conductor track in the same conductor layer as said discontinuity, which bridging track couples said serpentine conductor track to bypass one of said first and second circuit elements.
The serpentine conductor track situated between two circuit elements allows great flexibility in how these two circuit elements are decoupled from each other. In particular, since the track extends through all conductor layers, the two elements can later be decoupled from each other by creating a discontinuity in any of the conductor layers that the serpentine track passes through. Furthermore, one of the two circuit elements can be bypassed with a bridging conductor track which is situated in the same conductor layer. This means that the functionality of the two elements can be altered with a change in only one conductor layer, and which may be achieved in any of the metal layers. Alternatively, the two circuit elements may be originally decoupled, and in a later revision coupled to each other.
In another aspect of the invention, an ID module in an IC is comprised by the above described cell with first and second circuit elements and the serpentine track. The circuit elements may be logic gates, such as inverters. The ID module may include a plurality of the cells in parallel, each having an input which receives a common logic signal. Where the cells are configured identically, the output of each cell will be identical. However, the output of the group of cells can be selected by controlling the configuration of the cells, which can be done in any conductor layer. Additionally, where a circuit revision is accomplished in another part of the integrated circuit by changing the routing in a certain conductor layer, the output of the cell(s) of the ID module can be revised in the same conductor layer. Thus, the circuit change and the ID module change can be implemented with changes to only one mask. This ultimately reduces the cost attributed to the IC, by simplifying changes to the ID module and reducing mask costs.
The invention also relates to a method of manufacturing an IC with the above-described structure.
REFERENCES:
patent: 6292024 (2001-09-01), Jensen et al.
Dufour Yves
Jensen Rune Hartung
Koninklijke Philips Electronics , N.V.
Tan Vibol
Tokar Michael
Vodopia John
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