Integrated circuit and standard cell for an integrated circuit

Electronic digital logic circuitry – Exclusive function

Reexamination Certificate

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Details

C326S104000

Reexamination Certificate

active

08030963

ABSTRACT:
In one embodiment, a cell of an integrated circuit includes a master-slave flip-flop and comparator logic having inputs adapted to receive an input signal of the master-slave flip-flop, an inverted input signal of the master-slave flip-flop, an output signal of the master-slave flip-flop, and an inverted output signal of the master-slave flip-flop. The master-slave flip-flop comprises a master flip-flop and a slave flip-flop. The slave flip-flop includes a first inverting element and a second inverting element. An output of the first inverting element is connectable to an input of the second inverting element and an output of the second inverting element to an input of the first inverting element. To output the output signal and the inverted output signal of the master-slave flip-flop, the output and the input of the second inverting element are connectable to the inputs of the comparator logic.

REFERENCES:
patent: 6453431 (2002-09-01), Bernstein et al.
patent: 2004/0243893 (2004-12-01), Mudge et al.
patent: 2006/0220716 (2006-10-01), Nicolaidis
U. Tietze and CH. Schenk, “Semiconductor Technology”, 12thedition, 2002, pp. 675 to 681.
R. J. Baker et al., “CMOS—Circuit Design”, Layout, and Simulation ,IEEE Press, 1998, p. 270 and p. 291.

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