Integrated circuit and method outputting data

Electrical computers and digital processing systems: memory – Storage accessing and control – Specific memory composition

Reexamination Certificate

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C712S035000

Reexamination Certificate

active

06941418

ABSTRACT:
A circuit according to an embodiment of the present invention can load data in parallel to a barrel shifter, and output data to a pipelined multiplexer stage. The multiplexer is used to direct data from predetermined barrel slots to a predetermined number of output data slots. A control logic circuit will determine which of the barrel shifter entries are the oldest, and will drive the selects of the multiplexer to direct them to the output. The second stage of the multiplexer will drive the four 16-bit outputs to generate the 64-bit user data path. Methods for implementing the embodiments of the invention are also disclosed.

REFERENCES:
patent: 5519345 (1996-05-01), Farrell et al.
patent: 5831467 (1998-11-01), Leung et al.
patent: 5954811 (1999-09-01), Garde
patent: 6212591 (2001-04-01), Kaplinsky
patent: 6848042 (2005-01-01), Campbell et al.

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