Semiconductor device manufacturing: process – Coating with electrically or thermally conductive material – To form ohmic contact to semiconductive material
Reexamination Certificate
2006-02-21
2006-02-21
Cao, Phat X. (Department: 2814)
Semiconductor device manufacturing: process
Coating with electrically or thermally conductive material
To form ohmic contact to semiconductive material
C438S598000, C438S614000
Reexamination Certificate
active
07001834
ABSTRACT:
A packaged IC includes an IC die with signal and signal complement traces positioned relative to each other to maximize broadside coupling for a matching impedance. The signal and signal complement traces are electrically connected to transmission or receive channels of the IC die. Use of a broadside coupled trace configuration alleviates routing congestion in an IC package and permits an IC to accommodate a greater number of channels within a given surface area than is possible under the prior art.
REFERENCES:
patent: 6078100 (2000-06-01), Duesman et al.
patent: 6271478 (2001-08-01), Horiuchi et al.
patent: 6555920 (2003-04-01), Chung et al.
Barnes James Oliver
Devnani Nurwati S
Lai Benny W H
Moore Charles E
Agilent Technologie,s Inc.
Bouscaren June L.
Cao Phat X.
Doan Theresa T.
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