Electronic digital logic circuitry – Interface – Current driving
Reexamination Certificate
2002-02-20
2004-06-22
Le, Don (Department: 2819)
Electronic digital logic circuitry
Interface
Current driving
C326S030000, C326S027000
Reexamination Certificate
active
06753699
ABSTRACT:
FIELD OF THE INVENTION
This invention relates to integrated circuits, in general, and to driver circuits and methods of controlling output impedance, in particular.
BACKGROUND OF THE INVENTION
Many different types of driver circuits with on-chip termination have been developed to improve signal integrity in high-speed data communications. For example, on-chip termination provides improved signal integrity between transceivers over a transmission medium by matching the output impedance of the transceiver with the input impedance of the transmission medium. On-chip termination also provides lower system cost and lower component count.
One example of a driver circuit with on-chip termination is briefly discussed in “A 2-Gbaud 0.7-V Swing Voltage-Mode Driver and On-Chip Terminator for High-Speed NRZ Data Transmission,”
IEEE Journal of Solid-State Circuits
, Volume 35, Number 6, June 2000, by Gijung Ahn, et al. The driver circuit briefly discussed by Gijung Ahn, et al., however, has the following problems. First, the termination is provided by a separate circuit from the driver circuit instead of being an integral part of the driver circuit itself. This separate circuit termination technique requires a large amount of space of a semiconductor chip. Second, the termination scheme described does not behave linearly near the supply rails, which is important for rail-to-rail output driver circuits.
Another example of a driver circuit with on-chip termination is described in U.S. Pat. No. 5,898,312, issued on Apr. 27, 1999 and invented by Alper Ilkbahar, et al. One of the many disadvantages of this type of driver circuit is its digital on-chip termination technique. For example, the digital termination technique uses discrete steps, which generates high frequency components and produces problems with Electro-Magnetic Interference (EMI). Furthermore, a large amount of space on a semiconductor chip is required to implement the digital termination technique.
Accordingly, a need exists for an improved integrated circuit and a improved method of controlling output impedance. It is desired for the integrated circuit to minimize problems associated with EMI and also with large semiconductor chip space. It is also desired for the integrated circuit to behave linearly near the supply rails.
SUMMARY OF THE INVENTION
In accordance with the principles of the invention, an integrated circuit comprises a voltage-mode driver circuit having an integral, analog on-chip termination.
Further, in accordance with the principles of the invention, an integrated circuit comprises a first three-terminal device of a first type and a second three-terminal device of the first type. A first terminal of the second three-terminal device is electrically coupled to a first terminal of the first three-terminal device, and a second terminal of the second three-terminal device is electrically coupled to a second terminal of the first three-terminal device. A reference current applied to a third terminal of the second three-terminal device generates a control voltage applied to the second terminals of the first and second three-terminal devices. The control voltage is a function of comparing an output voltage at the third terminal of the second three-terminal device to a reference voltage. The reference current is derived from the reference voltage and a reference resistance.
Still further, in accordance with the principles of the invention, a driver circuit comprises (1) a first MOSFET having a first gate electrode, a first drain electrode, and a first source electrode, (2) a first resistor coupled to the first drain electrode, (3) an output of the driver circuit coupled to the first resistor, (4) a second MOSFET having a second gate electrode, a second drain electrode, and a second source electrode, the first and second gate electrodes coupled together and the first and second source electrodes coupled together, (5) a second resistor coupled to the second drain electrode, (6) a third MOSFET having a third gate electrode, a third drain electrode, and a third source electrode, the third source electrode coupled to the second resistor, (7) an amplifier having a first amplifier input, a second amplifier input, and an amplifier output, the first amplifier input coupled to the second resistor and the third source electrode, the second amplifier input coupled to a reference voltage, and the amplifier output coupled to the third gate electrode, and (8) a current source coupled to the third drain electrode, the first gate electrode, and the second gate electrode.
Also in accordance with the principles of the invention, a method of controlling output impedance of a driver circuit comprises generating a reference current as a function of a reference voltage and a reference resistance, using a first sub-circuit to generate the output impedance of the driver circuit, using a second sub-circuit in a feedback loop to generate a control current, and using the control current to control the output impedance.
Additionally, in accordance with the principles of the invention, a method of controlling output impedance of a driver circuit comprises generating a reference voltage as a function of a reference current and a reference resistance, using a first sub-circuit to generate the output impedance of the driver circuit, using a second sub-circuit in a feedback loop to generate a control voltage, and using the control voltage to control the output impedance.
REFERENCES:
patent: 4469961 (1984-09-01), Milberger et al.
patent: 5254883 (1993-10-01), Horowitz et al.
patent: 5767703 (1998-06-01), Fattori et al.
patent: 5898321 (1999-04-01), Ilkbahar et al.
patent: 6236246 (2001-05-01), Leighton et al.
Ahn, et al.; A 2-Gbaud 0.7-V Swing Voltage-Mode Driver and On-Chip Terminator for High Speed NRZ Data Transmission;IEEE Journal of Solid State Circuits, Jun. 2000, pp. 915-918.
Bryan Cave LLP
Le Don
Standard Microsystems Corporation
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