Static information storage and retrieval – Read/write circuit – Signals
Reexamination Certificate
2002-02-19
2003-10-14
Mai, Son (Department: 2818)
Static information storage and retrieval
Read/write circuit
Signals
C365S196000, C257S922000, C713S194000
Reexamination Certificate
active
06633501
ABSTRACT:
BACKGROUND OF THE INVENTION
Field of the Invention
The invention relates to an integrated circuit for processing security-relevant data having data output circuits and access control circuits. The invention also relates to a circuit configuration for supplying power to security-relevant parts of an integrated circuit.
Integrated circuits used in smart cards containing security-relevant data can be the target of a wide variety of attacks on the security-relevant data contained in the integrated circuits.
Physical attacks on smart cards can have various goals, such as reading-out (probing) of secret signals or forcing of control signals.
Therefore, in security technologies, secret signals and control signals are conducted in mask planes that are difficult to access, and are additionally protected by a shielding layer (a so-called security layer).
Over and above the methods of probing and forcing, however, it is also possible to isolate circuit blocks from the supply in order deliberately to generate “stuck at” errors on control signals and thus to cancel e.g. blockade functions.
In order to defend against such attacks in which access control circuits on an IC (Integrated Circuit) are deliberately rendered voltageless, the supply of such access control circuits has hitherto been routed or conducted twice (both in the aluminum plane and in the diffusion plane). In accordance with the prior art, such an attack described above could thus be warded off by routing or conducting the supply to the access control circuits in inseparable layers (planes of the IC) for example in the diffusion plane.
Routing or conducting the supply twice has the disadvantage that a considerable amount of space on the IC is lost, since signals could otherwise be conducted in the diffusion. Conducting the power supply exclusively in the diffusion has the disadvantage that the electrical resistance of the diffusion layer is usually higher. Therefore, either voltage drops occur, or it is necessary to provide tracks of appropriate width in the diffusion, which again leads to a considerable loss of space.
SUMMARY OF THE INVENTION
It is accordingly an object of the invention to provide an integrated circuit for processing security-relevant data and a circuit configuration for supplying power to security-relevant parts of an integrated circuit which overcome the above-mentioned disadvantages of the heretofore-known circuits of this general type and in which, while maintaining or improving the security, the space required for a power supply of security-relevant parts of the IC is reduced wherein the power supply is additionally or exclusively conducted in the diffusion.
With the foregoing and other objects in view there is provided, in accordance with the invention, in combination with an integrated circuit having security-relevant parts and access control circuits for protecting the security-relevant parts, a circuit configuration for supplying power to the security-relevant parts, the circuit configuration including:
a power supply circuitry for supplying power to the security-relevant parts; and
the power supply circuitry being laid out such that a power supply to the security-relevant parts is interrupted if a power supply to the access control circuits is disturbed.
In other words, the object of the present invention is achieved through the use of a circuit configuration for the power supply of security-relevant parts of an integrated circuit, which are protected by corresponding access control circuits, wherein the power supply of the security-relevant parts is conducted or routed in such a way that the power supply is interrupted if the power supply of the access control circuits is disturbed.
The object of the invention is thus achieved by virtue of the fact that a disturbance of the power supply of the access control circuits leads to a blocking of the data output circuits.
In this case, a particularly simple solution is possible if the power supply of the security-relevant parts is connected to the power supply of the access control circuits.
Greater security is afforded by a solution in which the power supply of the security-relevant parts is conducted via one or more switches which open if the power supply of the access control circuits is disturbed. In this way, it is possible to prevent the forcible re-establishment of a power supply of the security-relevant parts while the power supply of the access control circuits is interrupted.
In this case, it is particularly preferred for an NMOS (Negative-Channel Metal Oxide Semiconductor) switch to be provided between the general power supply V
DD
and the power supply of the security-relevant parts, the gate of which is connected to the V
DD
power supply of the access control circuits via a line routed in the diffusion or in a security layer.
Even greater security of the integrated circuits can preferably be achieved, in conjunction, naturally, with a somewhat higher outlay, through a combination of the security measures described above.
With the objects of the invention in view there is also provided, an integrated circuit for processing security-relevant data, including:
data output circuits; and
access control circuits operatively connected to the data output circuits such that a disturbance in a power supply to the access control circuits results in a blocking of the data output circuits.
One possible preferred embodiment of this solution is based on the fact that blocking signals are generated by the access control circuits, which are respectively inverse in pairs, and the data output circuits operate only when in each case both inverse blocking signals indicate cancellation of the blocking. If one of the power supplies of the access control circuit is interrupted, one of the blocking signals inevitably assumes a “false” value, as a result of which the data output is blocked.
In this case, it is particularly preferred for the respectively mutually associated inverse blocking signals to be conducted parallel to one another in the integrated circuit, preferably one above the other. This makes it more difficult to attack an individual blocking signal.
Furthermore, it is preferred for the blocking signals to be conducted in the diffusion or in a security layer. Otherwise, deblocking of the data output circuits could be achieved through an attack on the blocking signals, although with some outlay.
Another preferred development of the invention is based on the power supply of the data output circuits being conducted in such a way that the power supply is interrupted if the power supply of the access control circuit is disturbed.
For this purpose, the power supply of the data output circuits may preferably be connected to the power supply of the access control circuits. This is a very simple possibility for protecting the integrated circuit against the abovementioned manipulations.
Even greater security is afforded by the preferred solution, in which the power supply of the data output circuits is conducted via one or more switches which open if the power supply of the access control circuits is disturbed. In this way, it is also possible to avoid the situation where the power supply of the data output circuit is re-established by placing an electrically conductive needle onto corresponding regions of the IC, even though the power supply of the access control circuits is disturbed.
In this case, particularly preferred is a solution wherein an NMOS switch is provided between the general supply voltage V
DD
and the power supply of the data output circuits, the gate of which is connected to the V
DD
power supply of the access control circuits via a line routed in the diffusion or in a security layer.
Other features which are considered as characteristic for the invention are set forth in the appended claims.
Although the invention is illustrated and described herein as embodied in an integrated circuit and a circuit configuration for the power supply of an integrated circuit, it is nevertheless not intended to be limited to the details shown, since various mo
Greenberg Laurence A.
Infineon - Technologies AG
Mai Son
Mayback Gregory L.
Stemer Werner H.
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