Semiconductor device manufacturing: process – Packaging or treatment of packaged semiconductor – Making plural separate devices
Reexamination Certificate
2002-01-22
2008-08-19
Thai, Luan (Department: 2891)
Semiconductor device manufacturing: process
Packaging or treatment of packaged semiconductor
Making plural separate devices
C438S118000, C438S113000, C438S106000, C438S612000, C438S613000, C257S723000, C257S724000
Reexamination Certificate
active
07413929
ABSTRACT:
An integrated chip package structure and method of manufacturing the same is by adhering dies on an organic substrate and forming a thin-film circuit layer on top of the dies and the organic substrate. Wherein the thin-film circuit layer has an external circuitry, which is electrically connected to the metal pads of the dies, that extends to a region outside the active surface of the dies for fanning out the metal pads of the dies. Furthermore, a plurality of active devices and an internal circuitry is located on the active surface of the dies. Signal for the active devices are transmitted through the internal circuitry to the external circuitry and from the external circuitry through the internal circuitry back to other active devices. Moreover, the chip package structure allows multiple dies with different functions to be packaged into an integrated package and electrically connecting the dies by the external circuitry.
REFERENCES:
patent: 3677112 (1972-07-01), Keniston
patent: 4235498 (1980-11-01), Snyder
patent: 5049980 (1991-09-01), Saito et al.
patent: 5111278 (1992-05-01), Eichelberger
patent: 5353498 (1994-10-01), Fillion et al.
patent: 5576517 (1996-11-01), Wojnarowski et al.
patent: 5606198 (1997-02-01), Ono et al.
patent: 5745984 (1998-05-01), Cole et al.
patent: 5767564 (1998-06-01), Kunimatsu et al.
patent: 5841193 (1998-11-01), Eichelberger
patent: 5854001 (1998-12-01), Casey et al.
patent: 5874770 (1999-02-01), Saia et al.
patent: 5939214 (1999-08-01), Mahulikar et al.
patent: 6004867 (1999-12-01), Kim et al.
patent: 6025995 (2000-02-01), Marcinkiewicz
patent: 6078104 (2000-06-01), Sakurai
patent: 6139666 (2000-10-01), Fasano et al.
patent: 6159767 (2000-12-01), Eichelberger
patent: 6205032 (2001-03-01), Shepherd
patent: 6229203 (2001-05-01), Wojnarowski
patent: 6242987 (2001-06-01), Schopf et al.
patent: 6274391 (2001-08-01), Wachtler et al.
patent: 6395580 (2002-05-01), Tseng
patent: 6396148 (2002-05-01), Eichelberger et al.
patent: 6428377 (2002-08-01), Choi
patent: 6439728 (2002-08-01), Copeland
patent: 6486535 (2002-11-01), Liu
patent: 6495914 (2002-12-01), Sekine et al.
patent: 6590291 (2003-07-01), Akagawa
patent: 6614110 (2003-09-01), Pace
patent: 6690845 (2004-02-01), Yoshimura et al.
patent: 6730857 (2004-05-01), Konrad et al.
patent: 6759273 (2004-07-01), Felton et al.
patent: 2002/0070443 (2002-06-01), Mu et al.
patent: 2002/0074641 (2002-06-01), Towle et al.
Huang Ching-Cheng
Lee Jin-Yuan
Lin Mou-Shiung
Hsu Winston
MEGICA Corporation
Thai Luan
LandOfFree
Integrated chip package structure using organic substrate... does not yet have a rating. At this time, there are no reviews or comments for this patent.
If you have personal experience with Integrated chip package structure using organic substrate..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Integrated chip package structure using organic substrate... will most certainly appreciate the feedback.
Profile ID: LFUS-PAI-O-4009177