Integrated BEOL thin film resistor

Semiconductor device manufacturing: process – Making passive device

Reexamination Certificate

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C438S382000

Reexamination Certificate

active

07485540

ABSTRACT:
In the course of forming a resistor in the back end of an integrated circuit, an intermediate dielectric layer is deposited and a trench etched through it and into a lower dielectric layer by a controllable amount, so that the top of a resistor layer deposited in the trench is close in height to the top of the lower dielectric layer; the trench is filled and the resistor layer outside the trench is removed, after which a second dielectric layer is deposited. Vias passing through the second dielectric layer to contact the resistor then have the same depth as vias contacting metal interconnects in the lower dielectric layer. A tri-layer resistor structure is employed in which the resistive film is sandwiched between two protective layers that block diffusion between the resistor and BEOL ILD layers.

REFERENCES:
patent: 5485138 (1996-01-01), Morris
patent: 6069398 (2000-05-01), Kadosh et al.
patent: 6498385 (2002-12-01), Daubenspeck et al.
patent: 6734076 (2004-05-01), Jaiswal et al.
patent: 2001/0049199 (2001-12-01), Steinmann et al.
patent: 2003/0017699 (2003-01-01), Zurcher et al.
patent: 2007/0096260 (2007-05-01), Eshun et al.
patent: 2007/0096319 (2007-05-01), Hsu et al.

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