Semiconductor device manufacturing: process – Coating of substrate containing semiconductor region or of... – Insulative material deposited upon semiconductive substrate
Reexamination Certificate
1995-08-29
2002-07-23
Bowers, Charles (Department: 2813)
Semiconductor device manufacturing: process
Coating of substrate containing semiconductor region or of...
Insulative material deposited upon semiconductive substrate
C438S622000, C438S783000, C257S642000, C257S638000
Reexamination Certificate
active
06423651
ABSTRACT:
TECHNICAL FIELD
The present invention relates to an insulating film of a semiconductor device and a coating solution for forming the insulating film and a method of manufacturing the insulating film, and in particular, relates to an improvement in an insulating film which is provided between metal wiring lines formed on a large scale semiconductor integrated circuit, and a coating solution for forming the insulating film, and a method of manufacturing the insulating film.
BACKGROUND ART
In the prior art, with the progress in microminiaturization and high integration of a semiconductor device, a width of a device element and an interval between elements, for example, a width of a metal wiring line and its interval have been decreased more and more. In contrast, a height of the element such as the metal wiring line has not substantially been reduced for the reason that a wiring resistance and a current density cannot be increased to a great extent. Accordingly, in recent semiconductor devices, the interval between the metal wiring lines in a lateral direction is very narrow, and the height of the wiring line is still high. In such a large scale semiconductor integrated circuit, the aspect ratio of a height to a width of the metal wiring line has been increased remarkably. Such a trend of increase of the aspect ratio is not limited to the metal wiring line, and it is similar also in other device elements.
As an interlayer insulating film which is formed on various elements such as the metal wiring lines of a high aspect ratio, it is required not only to insure insulation between the elements but also to have an excellent filling property which enables to fill up between the elements without leaving a void and to fill completely between the elements.
Furthermore, in order to insure a focus margin in lithography process conducted after formation of the interlayer insulating film, an excellent property for forming a planar surface is required, which enables to sufficiently moderate surface irregularities or undulation in the interlayer insulating film.
As the insulating film which can be filled between narrow elements as mentioned above, for example, there is a silicon oxide thin film formed by a chemical vapor deposition method by thermal decomposition or plasma decomposition of monosilane. However, in the insulating film (silicon oxide thin film) formed by this method, voids are apt to be formed between the elements, and actually, a sufficient filling property and a planarizing property are not obtained.
Accordingly, as the method of forming an insulating film which is excellent in the filling property of a narrow space between elements, there is a method of forming an insulating film by chemical vapor deposition by ozone oxidation of an organic silane as disclosed in Japanese Patent Laid-Open Publication No. 61-77695.
Furthermore, as disclosed in Japanese Patent Laid-Open Publication No. Hei 3-203240, there is an insulating film having a multilayer structure including a spin-on glass film (hereinafter referred to as an “SOG” film). In this prior art insulating film, an advantage is provided which enables to achieve a planar surface of the insulating film, because the occurrence of a crack in the SOG film can be prevented even when the SOG film is coated to a large thickness.
Furthermore, there is another prior art technique in which after filling a narrow space between the elements with an insulating film formed by chemical vapor deposition, an insulating film is further grown over the whole surface to a large thickness, and thereafter, an unnecessary insulating film is removed by a chemical mechanical polishing technique (CMP) thereby to achieve a planar surface of the insulating However, in the insulating film formed by the method disclosed in the Japanese Patent Laid-Open Publication No. 61-77695, although the filling property of a narrow space between the elements is excellent, on the other hand, there is a drawback that a film thickness becomes thin when the insulating film is formed on a pad or a flat and wide interval between the elements. Accordingly, there is a problem that planarization cannot be achieved over the whole region of the surface.
Furthermore, in the insulating film having a multilayer structure including an SOG film obtained by the method disclosed in the Japanese Patent Laid-Open Publication No. Hei 3-203240, although the occurrence of a crack in the SOG film is prevented to some extent, there is a problem that peeling and crack are easily occurred in a film other than the SOG film constituting the above-mentioned insulating film due to a difference in a shrinkage ratio between the SOG film and the other film. Furthermore, there is a problem that planarization cannot be achieved sufficiently over the whole region of the surface.
Furthermore, in the prior art in which the chemical vapor deposition technique is combined with the chemical mechanical polishing technique, it is possible to insure the planar surface formation over the whole region of the semiconductor substrate depending on conditions, however, there is a problem that the setting of the conditions is difficult. Moreover, there is a problem that expensive apparatus is needed, and this leads to a large increase in costs. There is another problem that the detection of an end point is difficult in the chemical mechanical polishing, and non-uniformity between the wafers is large and the throughput is low. Furthermore, there is a problem that the yield is low due to the occurrence of contamination and particles.
DISCLOSURE OF THE INVENTION
The present invention solves the problems in the prior art as mentioned above, and it is an object to provide an insulating film of a semiconductor device and an insulation film forming coating solution for forming the insulating film and a method of manufacturing the insulating film, which of course enables to obtain a good film quality wherein the shrinkage ratio is small, and the oxygen plasma resistant property and the etching workability are excellent and the crack is not occurred, and also the excellent filling property and the formation of a thick film and the planar surface forming property are simultaneously achieved.
In order to achieve the object, the invention in claims
1
and
2
relates to an insulating film of a semiconductor device, and it provides an insulating film of a semiconductor device characterized in that the insulating film comprises a silane-derived compound expressed by
a general formula, SiH
x
(CH
3
)
y
O
2−(x+y)/2
(where, 0<x<1, 0<y<1, x+y≦1).
Furthermore, the invention of claims
3
to
5
relates to an insulating film forming coating solution for forming an insulating film of a semiconductor device, and it provides an insulating film forming coating solution containing as a main component a solution of a polymer obtained by co-hydrolysis of.
trialkoxysilane expressed by a general formula, SiH (OR)
3
, and
methyltrialkoxysilane expressed by a general formula, SiCH
3
(OR)
3
.
Furthermore, the invention of claims
6
to
8
relates to an insulating film forming coating solution for forming an insulating film of a semiconductor device, and it provides an insulating film forming coating solution containing as a main component a solution of a polymer obtained by co-hydrolysis of.
tetraalkoxysilane expressed by a general formula, Si (OR)
4
,
trialkoxysilane expressed by a general formula, SiH (OR)
3
, and
methyltrialkoxysilane expressed by a general formula, SiCH
3
(OR)
3
.
Furthermore, the invention of claims
9
relates to a method of forming an insulating film of a semiconductor device, and it provides a method of forming an insulating film comprising the steps of coating the insulating film forming coating solution described in any of claims
3
to
8
on a semiconductor substrate having a desired pattern formed thereon, and drying the coated insulating film forming coating solution and thereafter heating and curing in an inert gas atmosphere.
The insulating film described in claims
1
and
2
is compris
Nakano Tadashi
Tokunaga Kyoji
Bowers Charles
Kawasaki Steel Corporation
Kielin Erik
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