Insulated structure of a chip array component and...

Semiconductor device manufacturing: process – Coating of substrate containing semiconductor region or of... – Combined with the removal of material by nonchemical means

Reexamination Certificate

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C438S758000, C438S329000, C438S107000, C438S508000

Reexamination Certificate

active

07135415

ABSTRACT:
An insulated structure of a chip array component and fabrication method of the same, the element is fabricated by enclosing its main body with a dense layer of high surface insulation resistance material, and then exposing the portions of the main body where terminal electrodes are to be formed by removing the dense layer of high surface insulation resistance material by employing sand blasting, laser trimming, grinding, or etching process.

REFERENCES:
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patent: 5493769 (1996-02-01), Sakai et al.
patent: 5888884 (1999-03-01), Wojnarowski
patent: 6576999 (2003-06-01), Sakai et al.
patent: 2001/0030593 (2001-10-01), Imada et al.
patent: 2003/0005576 (2003-01-01), Tsukada

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