Insulated gate silicon nanowire transistor and method of...

Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode

Reexamination Certificate

Rate now

  [ 0.00 ] – not rated yet Voters 0   Comments 0

Details

C257S009000, C257S014000, C257S018000, C257S019000, C257S746000, C257S784000, C257SE51040, C977S742000, C977S762000, C977S938000

Reexamination Certificate

active

07485908

ABSTRACT:
An insulated gate silicon nanowire transistor amplifier structure is provided and includes a substrate formed of dielectric material. A patterned silicon material may be disposed on the substrate and includes at least first, second and third electrodes uniformly spaced on the substrate by first and second trenches. A first nanowire formed in the first trench operates to electrically couple the first and second electrodes. A second nanowire formed in the second trench operates to electrically couple the second and third electrodes. First drain and first source contacts may be respectively disposed on the first and second electrodes and a first gate contact may be disposed to be capacitively coupled to the first nanowire. Similarly, second drain and second source contacts may be respectively disposed on the second and third electrodes and a second gate contact may be disposed to be capacitively coupled to the second nanowire.

REFERENCES:
patent: 7015500 (2006-03-01), Choi et al.
patent: 7087920 (2006-08-01), Kamins
patent: 7135728 (2006-11-01), Duan et al.
patent: 7342277 (2008-03-01), Radosavljevic et al.
patent: 2003/0178617 (2003-09-01), Appenzeller et al.
patent: 2005/0121706 (2005-06-01), Chen et al.
M. Saif Islam, S. Sharma, T.I. Kamins and R. Stanley Williams—Ultrahigh-density silicon nanobridges formed between two vertical silicon surfaces—Published Jan. 23, 2004—pp. L5-L8.
Hou T. Ng, J. Han, Toshishige Yamada, P. Nguyen, Ui P. Chen, and M. Meyyappan—Single Crystal Nanowire Vertical Surround-Gate Field-Effect Transistor—Published May 29, 2004—Nano Lett., vol. 4 No. 7—pp. 1247-1252.
Nanowire HEMTs: Towards the Realization of THz Receivers—pp. 1-5.

LandOfFree

Say what you really think

Search LandOfFree.com for the USA inventors and patents. Rate them and share your experience with other people.

Rating

Insulated gate silicon nanowire transistor and method of... does not yet have a rating. At this time, there are no reviews or comments for this patent.

If you have personal experience with Insulated gate silicon nanowire transistor and method of..., we encourage you to share that experience with our LandOfFree.com community. Your opinion is very important and Insulated gate silicon nanowire transistor and method of... will most certainly appreciate the feedback.

Rate now

     

Profile ID: LFUS-PAI-O-4093302

  Search
All data on this website is collected from public sources. Our data reflects the most accurate information available at the time of publication.