Active solid-state devices (e.g. – transistors – solid-state diode – Field effect device – Having insulated electrode
Reexamination Certificate
2001-07-18
2003-01-21
Chaudhurl, Olik (Department: 2814)
Active solid-state devices (e.g., transistors, solid-state diode
Field effect device
Having insulated electrode
C438S259000, C438S271000
Reexamination Certificate
active
06509610
ABSTRACT:
INCORPORATION BY REFERENCE
The disclosure of Japanese Patent Application No. 2000-228872 filed on Jul. 28, 2000 including the specification, drawings and abstract is incorporated herein by reference in its entirety.
BACKGROUND OF THE INVENTION
1. Field of the Invention
The invention relates to a semiconductor device and a method of manufacturing a semiconductor device and, more particularly, to a semiconductor device comprising a first conductive-type semiconductor region made from a first conductive-type semiconductor material into which carriers are injected from a channel formed of a gate electrode and a second conductive-type semiconductor region made from a second conductive-type semiconductor material and formed in such a manner as to contact the first conductive-type semiconductor region, and to a method of manufacturing such a semiconductor device.
2. Description of Related Art
As a semiconductor device of this type, there has been proposed a trench-gate-type IGBT (insulated gate bipolar transistor) with a channel formed of a gate electrode formed in a trench (see Japanese Patent Application Laid-Open No. HEI 8-222728). In a trench-gate-type IGBT, since a channel is formed longitudinally along a trench, electrons can be sufficiently injected into a substrate from the channel.
In such a trench-gate-type IGBT, however, even if gate electrodes are arranged at intervals of a reduced distance to increase the amount of electrons injected from channels, effects of conductivity modulation deteriorate and the on-resistance is increased unless a sufficient amount of holes are supplied from a diode formed in a pn-junction portion on the collector side. Particularly, when the ambient temperature is very low, effects of conductivity modulation deteriorate and the operating temperature range of the IGBT is narrowed unless a sufficient amount of holes are supplied from the diode on the collector side.
SUMMARY OF THE INVENTION
A semiconductor device according to the invention aims at enhancing carrier injection efficiency and thus the overall performance. A method of manufacturing a semiconductor device according to the invention aims at manufacturing a semiconductor device with high carrier injection efficiency.
A semiconductor device according to a first aspect of the invention is a trench-gate-type semiconductor device comprising a first conductive-type semiconductor region made from a first conductive-type semiconductor material into which carriers are injected from a channel formed of a gate electrode formed in a trench and a second conductive-type semiconductor region made from a second conductive-type semiconductor material and formed in such a manner as to contact the first conductive-type semiconductor region. A contact surface between the first and second conductive-type semiconductor regions is formed in a convexo-concave shape.
In the first aspect of the invention, the contact surface between the first and second conductive-type semiconductor regions is formed in a convexo-concave shape. Thus, the area of the contact surface between the first and second conductive-type semiconductor regions can be enlarged, and the efficiency of injecting carriers into the first conductive-type semiconductor region from the second conductive-type semiconductor region can be enhanced with a correspondingly less voltage drop between the pn-junction regions. As a result, the performance of the semiconductor device can be improved.
A semiconductor device according to a second aspect of the invention is a semiconductor device comprising a first conductive-type semiconductor region made from a first conductive-type semiconductor material into which carriers are injected from a channel formed of a gate electrode and a second conductive-type semiconductor region made from a second conductive-type semiconductor material and formed in such a manner as to contact the first conductive-type semiconductor region. An average interface of a contact surface between the first and second conductive-type semiconductor regions is formed in such a manner as to form a predetermined angle with the channel. The contact surface is formed in a convexo-concave shape.
In the second aspect of the invention, the average interface of the contact surface between the first and second conductive-type semiconductor regions is formed in such a manner as to form a predetermined angle with the channel, and the contact surface between the first and second conductive-type semiconductor regions is formed in a convexo-concave shape. Thus, the area of the contact surface between one of the first and second conductive-type semiconductor regions and the other conductive-type semiconductor region can be enlarged, and the efficiency of injecting carriers into the first conductive-type semiconductor region from the second conductive-type semiconductor region can be enhanced. As a result, the performance of the semiconductor device can be improved.
In the first or second aspect of the invention, the contact surface may be at least partially formed as a curved surface. Thus, the area of the contact surface between the first and second conductive-type semiconductor areas can further be enlarged, resulting in a less voltage drop between the pn-junction regions for the same amount of injection of holes.
In the first or second aspect of the invention, the first conductive-type semiconductor regions may have a high-concentration impurity layer demonstrating a high concentration of impurities and a low-concentration impurity layer formed on the high-concentration impurity layer and demonstrating a low concentration of impurities. With this structure, the voltage blocking capability of the semiconductor device can be increased. In this structure, portions of the second conductive-type semiconductor region projecting into the first conductive-type semiconductor region may be formed in such a manner as to contact either the high-concentration impurity layer or the high-concentration and low-concentration impurity layers.
In a method of manufacturing a semiconductor device according to a third aspect of the invention, a trench-gate-type semiconductor device comprising a first conductive-type semiconductor region made from a first conductive-type semiconductor material in which carriers are injected from a channel formed of a gate electrode formed in a trench and a second conductive-type semiconductor region made from a second conductive-type semiconductor material and formed in such a manner as to, contact the first conductive-type semiconductor region is manufactured. This method comprises a semiconductor region forming process in which the first conductive-type semiconductor region and/or the second conductive-type semiconductor region are/is formed such that a contact surface between the first and second conductive-type semiconductor regions assumes a convexo-concave shape.
In the third aspect of the invention, a semiconductor device wherein the contact surface between the first and second conductive-type semiconductor regions assumes a convexo-concave shape, i.e., a semiconductor device wherein the contact surface between the first and second conductive-type semiconductor regions has a large area and wherein carriers are injected into one of the first and second conductive-type semiconductor regions from the other conductive-type semiconductor region with high efficiency can be manufactured.
In the third aspect of the invention, the semiconductor region forming process may include an impurity implantation process in which impurities are selectively implanted in the second conductive-type semiconductor region and a diffusion process in which the first conductive-type semiconductor region is formed in such a manner as to contact the second conductive-type semiconductor region and the impurities are diffused into the first conductive-type semiconductor region. Alternatively, the semiconductor region forming process may include a groove forming process in which grooves are formed in the second conductive-type semiconductor region and a process in w
Kawahashi Akira
Nishiwaki Katsuhiko
Chaudhurl Olik
Farahani Dana
Toyota Jidosha & Kabushiki Kaisha
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