Insulated-gate semiconductor device having a position recognizin

Details Insulated-gate semiconductor device having a position recognizin Insulated-gate semiconductor device having a position recognizin

1995-11-14

1998-03-31

Whitehead, Jr., Carl W.

Active solid-state devices (e.g., transistors, solid-state diode

Test or calibration structure

257288, 257297, 257368, 257328, 257173, 257355, 437 8, H01L 2358, H01L 2362, G01R 2136

Patent

active

057341753

ABSTRACT:
In an insulated-gate type semiconductor device, the gate of an insulated-gate type field effect transistor and its protection element are formed separately from each other. In order to electrically connect the gate with the protection element, a contact region is formed to come into contact with the protection element. On the metallic wiring pattern formed on the contact region, a position recognizing pattern is formed to recognize position of the semiconductor device. Using the metallic wiring pattern, a testing region is also formed to test the withstand voltage. Without increasing the chip size of the semiconductor device, the position recognizing pattern can be formed for the position of the semiconductor device and the testing region for withstand voltage testing can be formed.

REFERENCES:
patent: 4492974 (1985-01-01), Yoshida et al.

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